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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-07-09 18:41:12 +1000
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-10-26 03:57:11 +0100
commitdc878b45adff2f21bb209d8abdf3ccecc2dc32d8 (patch)
treedd7d3222b8de0bfac47f7458fe7b828f7add506a /src/arch
parent5962b4ce9c87f8d34bfc00b14820645ab8281e5f (diff)
downloadcoreboot-dc878b45adff2f21bb209d8abdf3ccecc2dc32d8.tar.xz
include/device/device.h: Deduplicate '*_pnp_devfn_t' typedefs
'pci_devfn_t' and 'pnp_devfn_t' are already defined in arch/io.h Change-Id: I006182bf6933fae21fe6671659b76e7031e74b71 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6230 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/include/arch/io.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index b6d82f9275..d5cdf350ba 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -4,6 +4,11 @@
#include <stdint.h>
#include <rules.h>
+/* FIXME: Sources for romstage still use device_t. */
+/* Use pci_devfn_t or pnp_devfn_t instead */
+typedef u32 pci_devfn_t;
+typedef u32 pnp_devfn_t;
+
/*
* This file contains the definitions for the x86 IO instructions
* inb/inw/inl/outb/outw/outl and the "string versions" of the same
@@ -218,11 +223,9 @@ static inline int log2f(int value)
#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
/* FIXME: Sources for romstage still use device_t. */
+/* Use pci_devfn_t or pnp_devfn_t instead */
typedef u32 device_t;
-typedef u32 pci_devfn_t;
-typedef u32 pnp_devfn_t;
-
/* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write memory above 4G,
* We don't need to set %fs, and %gs anymore
* Before that We need to use %gs, and leave %fs to other RAM access