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author | Li-Ta Lo <ollie@lanl.gov> | 2004-11-04 18:33:33 +0000 |
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committer | Li-Ta Lo <ollie@lanl.gov> | 2004-11-04 18:33:33 +0000 |
commit | 1995f1af35b53b5c07694df7296f5eb20461b1c6 (patch) | |
tree | 29702efb66016770e6289b2728908883c3188cfb /src/boot | |
parent | 23bc47db17a291aca980405157334395f328eb62 (diff) | |
download | coreboot-1995f1af35b53b5c07694df7296f5eb20461b1c6.tar.xz |
removed the comment in the very beginning of hardwaremain(). I don't
think it is relevant now.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1739 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/boot')
-rw-r--r-- | src/boot/hardwaremain.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/src/boot/hardwaremain.c b/src/boot/hardwaremain.c index 50126261d7..bdbd4a3791 100644 --- a/src/boot/hardwaremain.c +++ b/src/boot/hardwaremain.c @@ -39,14 +39,6 @@ it with the version available from LANL. void hardwaremain(int boot_complete) { - /* the order here is a bit tricky. We don't want to do much of - * anything that uses config registers until after PciAllocateResources - * since that function also figures out what kind of config strategy - * to use (type 1 or type 2). - * so we turn on cache, then worry about PCI setup, then do other - * things, so that the other work can use the PciRead* and PciWrite* - * functions. - */ struct lb_memory *lb_mem; post_code(0x80); |