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authorEric Biederman <ebiederm@xmission.com>2003-10-11 06:20:25 +0000
committerEric Biederman <ebiederm@xmission.com>2003-10-11 06:20:25 +0000
commit83b991afff40e12a8b6756af06a472842edb1a66 (patch)
treea441ff0d88afcb0a07cf22dc3653db3e07a05c98 /src/boot
parent080038bfbd8fdf08bac12476a3789495e6f705ca (diff)
downloadcoreboot-83b991afff40e12a8b6756af06a472842edb1a66.tar.xz
- O2, enums, and switch statements work in romcc
- Support for compiling romcc on non x86 platforms - new romc options -msse and -mmmx for specifying extra registers to use - Bug fixes to device the device disable/enable framework and an amd8111 implementation - Move the link specification to the chip specification instead of the path - Allow specifying devices with internal bridges. - Initial via epia support - Opteron errata fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/boot')
-rw-r--r--src/boot/hardwaremain.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/boot/hardwaremain.c b/src/boot/hardwaremain.c
index 687b102bbe..6231d1167e 100644
--- a/src/boot/hardwaremain.c
+++ b/src/boot/hardwaremain.c
@@ -160,7 +160,6 @@ void hardwaremain(int boot_complete)
/* If we have already booted attempt a hard reboot */
if (boot_complete) {
- printk_spew("calling hard_reset\n");
hard_reset();
}
CONFIGURE(CONF_PASS_PRE_PCI);