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authorStefan Reinauer <stepan@coresystems.de>2009-10-26 17:04:28 +0000
committerStefan Reinauer <stepan@openbios.org>2009-10-26 17:04:28 +0000
commit3b314023802c7429012e5f09652047e0b32fb97a (patch)
tree897ca57220eac3007d0864cc47205103b91417da /src/boot
parenta769344d437d608a2e714a01cdb847a2a69d0826 (diff)
downloadcoreboot-3b314023802c7429012e5f09652047e0b32fb97a.tar.xz
CBMEM high table memory manager.
This code adds a very simple toc based memory manager for the high tables area. The purpose of this code is to make it simpler and more reliable to find certain data structures in memory. This will also make it possible to have ACPI S3 Resume working without an ugly hole at 31MB. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/boot')
-rw-r--r--src/boot/hardwaremain.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/src/boot/hardwaremain.c b/src/boot/hardwaremain.c
index 5ab14fb09a..5f5b0efb02 100644
--- a/src/boot/hardwaremain.c
+++ b/src/boot/hardwaremain.c
@@ -39,12 +39,14 @@ it with the version available from LANL.
#if CONFIG_HAVE_ACPI_RESUME
#include <arch/acpi.h>
#endif
+#if CONFIG_WRITE_HIGH_TABLES
+#include <cbmem.h>
+#endif
/**
- * @brief Main function of the DRAM part of coreboot.
- *
- * Coreboot is divided into Pre-DRAM part and DRAM part.
+ * @brief Main function of the RAM part of coreboot.
*
+ * Coreboot is divided into Pre-RAM part and RAM part.
*
* Device Enumeration:
* In the dev_enumerate() phase,
@@ -56,7 +58,7 @@ void hardwaremain(int boot_complete)
post_code(0x80);
- /* displayinit MUST PRECEDE ALL PRINTK! */
+ /* console_init() MUST PRECEDE ALL printk()! */
console_init();
post_code(0x39);
@@ -87,6 +89,9 @@ void hardwaremain(int boot_complete)
dev_initialize();
post_code(0x89);
+#if CONFIG_WRITE_HIGH_TABLES == 1
+ cbmem_initialize();
+#endif
#if CONFIG_HAVE_ACPI_RESUME == 1
suspend_resume();
post_code(0x8a);