- Update abuild.sh so it will rebuild successfull builds

- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
  enabled.  All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 4 insertions, 10 deletions

diff --git a/src/boot/hardwaremain.c b/src/boot/hardwaremain.c
index 8728a9c5a0..50126261d7 100644
--- a/src/boot/hardwaremain.c
+++ b/src/boot/hardwaremain.c
@@ -69,21 +69,15 @@ void hardwaremain(int boot_complete)
 	/* FIXME: Is there a better way to handle this? */
 	init_timer(); 
 
-	/* pick how to scan the bus. This is first so we can get at memory size. */
-	printk_info("Finding PCI configuration type.\n");
-	pci_set_method();
-	post_code(0x5f);
+	/* Find the devices we don't have hard coded knowledge about. */
 	dev_enumerate();
 	post_code(0x66);
-	/* Now do the real bus.
-	 * We round the total ram up a lot for thing like the SISFB, which 
-	 * shares high memory with the CPU. 
-	 */
+	/* Now compute and assign the bus resources. */
 	dev_configure();
 	post_code(0x88);
-
+	/* Now actually enable devices on the bus */
 	dev_enable();
-
+	/* And of course initialize devices on the bus */
 	dev_initialize();
 	post_code(0x89);