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author | sowmyav <v.sowmya@intel.com> | 2017-03-02 10:09:59 +0530 |
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committer | Martin Roth <martinroth@google.com> | 2017-03-10 11:19:04 +0100 |
commit | d448a5e98bab6942301032146b5cb0fe5625d496 (patch) | |
tree | fb116d6b0008432bee9b300f1e3522d5a1da80b0 /src/commonlib/configstring.c | |
parent | 6e53ae6f5c12b70c2a86370f0dd9df37a12c8118 (diff) | |
download | coreboot-d448a5e98bab6942301032146b5cb0fe5625d496.tar.xz |
soc/intel/skylake:Add _DSM method to reduce D3 cold delay for eMMC controller
eMMC Controller is taking over 100ms to resume during runtime which
results in I/O latency issues on the Skylake systems like Cave and Caroline.
This patch adds _DSM method for eMMC comtroller for specifying the
device readiness durations. Function index 9 returns package of five
integers to set D3 cold delay to zero and ACPI constant Ones for the
elements where overriding the default values is not desired.
BUG=b:35774937
BRANCH=none
TEST=update caroline coreboot and test i/o latency is under 100ms
Change-Id: Iacc8aa8560897da8770fe559ca8cd17aaf6ebeba
Signed-off-by: Sowmya V <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/18532
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/commonlib/configstring.c')
0 files changed, 0 insertions, 0 deletions