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| author | Furquan Shaikh <furquan@google.com> | 2020-11-25 17:15:09 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-12-08 22:56:09 +0000 |
| commit | 493937e1d67e734c2ac45f92280f2c2c22a50b85 (patch) | |
| tree | 16b77de5c971be7774935c8c98846bcead32c663 /src/commonlib/include | |
| parent | b53280ab53e19746be04b67f73f9ce230038b1ee (diff) | |
| download | coreboot-493937e1d67e734c2ac45f92280f2c2c22a50b85.tar.xz | |
coreboot tables: Add SPI flash memory map windows to coreboot tables
This change adds details about the memory map windows to translate
addresses between SPI flash space and host address space to coreboot
tables. This is useful for payloads to setup the translation using the
decode windows already known to coreboot. Until now, there was a
single decode window at the top of 4G used by all x86
platforms. However, going forward, platforms might support more decode
windows and hence in order to avoid duplication in payloads this
information is filled in coreboot tables.
`lb_spi_flash()` is updated to fill in the details about these windows
by making a call to `spi_flash_get_mmap_windows()` which is
implemented by the driver providing the boot media mapping device.
BUG=b:171534504
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I00ae33d9b53fecd0a8eadd22531fdff8bde9ee94
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48185
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/commonlib/include')
| -rw-r--r-- | src/commonlib/include/commonlib/coreboot_tables.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h index 3e74e6b59c..c740975bc7 100644 --- a/src/commonlib/include/commonlib/coreboot_tables.h +++ b/src/commonlib/include/commonlib/coreboot_tables.h @@ -349,12 +349,26 @@ struct lb_x86_rom_mtrr { uint32_t index; }; +/* Memory map windows to translate addresses between SPI flash space and host address space. */ +struct flash_mmap_window { + uint32_t flash_base; + uint32_t host_base; + uint32_t size; +}; + struct lb_spi_flash { uint32_t tag; uint32_t size; uint32_t flash_size; uint32_t sector_size; uint32_t erase_cmd; + /* + * Number of mmap windows used by the platform to decode addresses between SPI flash + * space and host address space. This determines the number of entries in mmap_table. + */ + + uint32_t mmap_count; + struct flash_mmap_window mmap_table[0]; }; struct lb_boot_media_params { |