diff options
author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-10 10:57:00 -0800 |
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committer | Martin Roth <martinroth@google.com> | 2017-03-13 21:23:21 +0100 |
commit | 49fd42dc65d6686f11eff691e37371ea6130a902 (patch) | |
tree | 001a3a0bdc8f64d0f69700862c0f5feeb4f0c5bb /src/commonlib/include | |
parent | 07441b5ae6db1d171474b393d98d7da9595bcc8a (diff) | |
download | coreboot-49fd42dc65d6686f11eff691e37371ea6130a902.tar.xz |
commonlib: Wrap lines at 80 columns
Fix the following warning detected by checkpatch.pl:
TEST=Build and run on Galileo Gen2
Change-Id: I811763c6de57dfdf5456579f63e83dca29d37d61
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18751
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/commonlib/include')
-rw-r--r-- | src/commonlib/include/commonlib/coreboot_tables.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h index f11fad6aa0..7c3130e793 100644 --- a/src/commonlib/include/commonlib/coreboot_tables.h +++ b/src/commonlib/include/commonlib/coreboot_tables.h @@ -111,7 +111,7 @@ struct lb_memory_range { #define LB_MEM_NVS 4 /* ACPI NVS Memory */ #define LB_MEM_UNUSABLE 5 /* Unusable address space */ #define LB_MEM_VENDOR_RSVD 6 /* Vendor Reserved */ -#define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */ +#define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */ }; struct lb_memory { @@ -383,7 +383,7 @@ struct cmos_entries { uint32_t bit; /* starting bit from start of image */ uint32_t length; /* length of field in bits */ uint32_t config; /* e=enumeration, h=hex, r=reserved */ - uint32_t config_id; /* a number linking to an enumeration record */ + uint32_t config_id; /* a number linking to an enumeration record */ #define CMOS_MAX_NAME_LENGTH 32 uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii, variable length int aligned */ @@ -425,8 +425,8 @@ struct cmos_checksum { /* In practice everything is byte aligned, but things are measured * in bits to be consistent. */ - uint32_t range_start; /* First bit that is checksummed (byte aligned) */ - uint32_t range_end; /* Last bit that is checksummed (byte aligned) */ + uint32_t range_start; /* First bit that is checksummed (byte aligned) */ + uint32_t range_end; /* Last bit that is checksummed (byte aligned) */ uint32_t location; /* First bit of the checksum (byte aligned) */ uint32_t type; /* Checksum algorithm that is used */ #define CHECKSUM_NONE 0 |