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| author | Martin Roth <martinroth@chromium.org> | 2018-05-02 12:41:02 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-05-04 01:04:45 +0000 |
| commit | f658edf434421a2cb475c753c08e6d92e2be58c1 (patch) | |
| tree | aaf55d3c2532bf2d1abcce70ca01e17deff0e6af /src/commonlib/include | |
| parent | 0f1d45c33fad4266b813134c390233efae9c3169 (diff) | |
| download | coreboot-f658edf434421a2cb475c753c08e6d92e2be58c1.tar.xz | |
commonlib: Add descriptions for new AGESA timestamps
When the latest AGESA timestamp values were added, the descriptions
weren't added along with them. Because of this, the cbmem tool just
shows them as "<unknown>".
Bug=b:79153552
TEST=None
Change-Id: Iad7bcd53bc6136b74d4d933d1a290feac6a0de56
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://review.coreboot.org/26001
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/commonlib/include')
| -rw-r--r-- | src/commonlib/include/commonlib/timestamp_serialized.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h index 11baf16773..42b55bca72 100644 --- a/src/commonlib/include/commonlib/timestamp_serialized.h +++ b/src/commonlib/include/commonlib/timestamp_serialized.h @@ -224,6 +224,12 @@ static const struct timestamp_id_to_name { { TS_AGESA_INIT_LATE_DONE, "back from AmdInitLate" }, { TS_AGESA_INIT_RTB_START, "calling AmdInitRtb/AmdS3Save" }, { TS_AGESA_INIT_RTB_DONE, "back from AmdInitRtb/AmdS3Save" }, + { TS_AGESA_INIT_RESUME_START, "calling AmdInitResume" }, + { TS_AGESA_INIT_RESUME_DONE, "back from AmdInitResume" }, + { TS_AGESA_S3_LATE_START, "calling AmdS3LateRestore" }, + { TS_AGESA_S3_LATE_DONE, "back from AmdS3LateRestore" }, + { TS_AGESA_S3_FINAL_START, "calling AmdS3FinalRestore" }, + { TS_AGESA_S3_FINAL_DONE, "back from AmdS3FinalRestore" }, /* Intel ME related timestamps */ { TS_ME_INFORM_DRAM_WAIT, "waiting for ME acknowledgement of raminit"}, |