coreboot: introduce commonlib

Instead of reaching into src/include and re-writing code
allow for cleaner code sharing within coreboot and its
utilities. The additional thing needed at this point is
for the utilities to provide a printk() declaration within
a <console/console.h> file. That way code which uses printk()
can than be mapped properly to verbosity of utility parameters.

Change-Id: I9e46a279569733336bc0a018aed96bc924c07cdd
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11592
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

10 files changed, 1377 insertions, 0 deletions

diff --git a/src/commonlib/include/commonlib/cbfs_serialized.h b/src/commonlib/include/commonlib/cbfs_serialized.h
new file mode 100644
index 0000000000..f6720959e3
--- /dev/null
+++ b/src/commonlib/include/commonlib/cbfs_serialized.h
@@ -0,0 +1,190 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008 Jordan Crouse <jordan@cosmicpenguin.net>
+ * Copyright (C) 2012 Google, Inc.
+ * Copyright (C) 2013 The Chromium OS Authors. All rights reserved.
+ *
+ * This file is dual-licensed. You can choose between:
+ *   - The GNU GPL, version 2, as published by the Free Software Foundation
+ *   - The revised BSD license (without advertising clause)
+ *
+ * ---------------------------------------------------------------------------
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ * ---------------------------------------------------------------------------
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ * ---------------------------------------------------------------------------
+ */
+
+#ifndef _CBFS_SERIALIZED_H_
+#define _CBFS_SERIALIZED_H_
+
+#include <stdint.h>
+
+/** These are standard values for the known compression
+    algorithms that coreboot knows about for stages and
+    payloads.  Of course, other CBFS users can use whatever
+    values they want, as long as they understand them. */
+
+#define CBFS_COMPRESS_NONE  0
+#define CBFS_COMPRESS_LZMA  1
+
+/** These are standard component types for well known
+    components (i.e - those that coreboot needs to consume.
+    Users are welcome to use any other value for their
+    components */
+
+#define CBFS_TYPE_STAGE      0x10
+#define CBFS_TYPE_PAYLOAD    0x20
+#define CBFS_TYPE_OPTIONROM  0x30
+#define CBFS_TYPE_BOOTSPLASH 0x40
+#define CBFS_TYPE_RAW        0x50
+#define CBFS_TYPE_VSA        0x51
+#define CBFS_TYPE_MBI        0x52
+#define CBFS_TYPE_MICROCODE  0x53
+#define CBFS_TYPE_FSP        0x60
+#define CBFS_TYPE_MRC        0x61
+#define CBFS_COMPONENT_CMOS_DEFAULT 0xaa
+#define CBFS_TYPE_SPD          0xab
+#define CBFS_TYPE_MRC_CACHE    0xac
+#define CBFS_COMPONENT_CMOS_LAYOUT 0x01aa
+
+#define CBFS_HEADER_MAGIC  0x4F524243
+#define CBFS_HEADER_VERSION1 0x31313131
+#define CBFS_HEADER_VERSION2 0x31313132
+#define CBFS_HEADER_VERSION  CBFS_HEADER_VERSION2
+
+/* this is the master cbfs header - it must be located somewhere available
+ * to bootblock (to load romstage). The last 4 bytes in the image contain its
+ * relative offset from the end of the image (as a 32-bit signed integer). */
+
+struct cbfs_header {
+	uint32_t magic;
+	uint32_t version;
+	uint32_t romsize;
+	uint32_t bootblocksize;
+	uint32_t align; /* fixed to 64 bytes */
+	uint32_t offset;
+	uint32_t architecture;
+	uint32_t pad[1];
+} __attribute__((packed));
+
+/* this used to be flexible, but wasn't ever set to something different. */
+#define CBFS_ALIGNMENT 64
+
+/* "Unknown" refers to CBFS headers version 1,
+ * before the architecture was defined (i.e., x86 only).
+ */
+#define CBFS_ARCHITECTURE_UNKNOWN  0xFFFFFFFF
+#define CBFS_ARCHITECTURE_X86      0x00000001
+#define CBFS_ARCHITECTURE_ARM      0x00000010
+
+/** This is a component header - every entry in the CBFS
+    will have this header.
+
+    This is how the component is arranged in the ROM:
+
+    --------------   <- 0
+    component header
+    --------------   <- sizeof(struct component)
+    component name
+    --------------   <- offset
+    data
+    ...
+    --------------   <- offset + len
+*/
+
+#define CBFS_FILE_MAGIC "LARCHIVE"
+
+struct cbfs_file {
+	char magic[8];
+	uint32_t len;
+	uint32_t type;
+	uint32_t checksum;
+	uint32_t offset;
+} __attribute__((packed));
+
+/*
+ * ROMCC does not understand uint64_t, so we hide future definitions as they are
+ * unlikely to be ever needed from ROMCC
+ */
+#ifndef __ROMCC__
+
+/*** Component sub-headers ***/
+
+/* Following are component sub-headers for the "standard"
+   component types */
+
+/** This is the sub-header for stage components.  Stages are
+    loaded by coreboot during the normal boot process */
+
+struct cbfs_stage {
+	uint32_t compression;  /** Compression type */
+	uint64_t entry;  /** entry point */
+	uint64_t load;   /** Where to load in memory */
+	uint32_t len;          /** length of data to load */
+	uint32_t memlen;	   /** total length of object in memory */
+} __attribute__((packed));
+
+/** this is the sub-header for payload components.  Payloads
+    are loaded by coreboot at the end of the boot process */
+
+struct cbfs_payload_segment {
+	uint32_t type;
+	uint32_t compression;
+	uint32_t offset;
+	uint64_t load_addr;
+	uint32_t len;
+	uint32_t mem_len;
+} __attribute__((packed));
+
+struct cbfs_payload {
+	struct cbfs_payload_segment segments;
+};
+
+#define PAYLOAD_SEGMENT_CODE   0x45444F43
+#define PAYLOAD_SEGMENT_DATA   0x41544144
+#define PAYLOAD_SEGMENT_BSS    0x20535342
+#define PAYLOAD_SEGMENT_PARAMS 0x41524150
+#define PAYLOAD_SEGMENT_ENTRY  0x52544E45
+
+struct cbfs_optionrom {
+	uint32_t compression;
+	uint32_t len;
+} __attribute__((packed));
+
+#endif /* __ROMCC__ */
+
+#endif /* _CBFS_SERIALIZED_H_ */
diff --git a/src/commonlib/include/commonlib/cbmem_id.h b/src/commonlib/include/commonlib/cbmem_id.h
new file mode 100644
index 0000000000..6812c41cc1
--- /dev/null
+++ b/src/commonlib/include/commonlib/cbmem_id.h
@@ -0,0 +1,113 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2009 coresystems GmbH
+ * Copyright (C) 2013 Google, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef _CBMEM_ID_H_
+#define _CBMEM_ID_H_
+
+#define CBMEM_ID_ACPI		0x41435049
+#define CBMEM_ID_ACPI_GNVS	0x474e5653
+#define CBMEM_ID_ACPI_GNVS_PTR	0x474e5650
+#define CBMEM_ID_AGESA_RUNTIME	0x41474553
+#define CBMEM_ID_AMDMCT_MEMINFO 0x494D454E
+#define CBMEM_ID_CAR_GLOBALS	0xcac4e6a3
+#define CBMEM_ID_CBTABLE	0x43425442
+#define CBMEM_ID_CONSOLE	0x434f4e53
+#define CBMEM_ID_COVERAGE	0x47434f56
+#define CBMEM_ID_EHCI_DEBUG	0xe4c1deb9
+#define CBMEM_ID_ELOG		0x454c4f47
+#define CBMEM_ID_FREESPACE	0x46524545
+#define CBMEM_ID_FSP_RESERVED_MEMORY 0x46535052
+#define CBMEM_ID_FSP_RUNTIME	0x52505346
+#define CBMEM_ID_GDT		0x4c474454
+#define CBMEM_ID_HOB_POINTER	0x484f4221
+#define CBMEM_ID_IGD_OPREGION	0x4f444749
+#define CBMEM_ID_IMD_ROOT	0xff4017ff
+#define CBMEM_ID_IMD_SMALL	0x53a11439
+#define CBMEM_ID_MEMINFO	0x494D454D
+#define CBMEM_ID_MPTABLE	0x534d5054
+#define CBMEM_ID_MRCDATA	0x4d524344
+#define CBMEM_ID_MTC		0xcb31d31c
+#define CBMEM_ID_NONE		0x00000000
+#define CBMEM_ID_PIRQ		0x49525154
+#define CBMEM_ID_POWER_STATE	0x50535454
+#define CBMEM_ID_RAM_OOPS	0x05430095
+#define CBMEM_ID_RAMSTAGE	0x9a357a9e
+#define CBMEM_ID_RAMSTAGE_CACHE	0x9a3ca54e
+#define CBMEM_ID_REFCODE	0x04efc0de
+#define CBMEM_ID_REFCODE_CACHE	0x4efc0de5
+#define CBMEM_ID_RESUME		0x5245534d
+#define CBMEM_ID_RESUME_SCRATCH	0x52455343
+#define CBMEM_ID_ROMSTAGE_INFO	0x47545352
+#define CBMEM_ID_ROMSTAGE_RAM_STACK 0x90357ac4
+#define CBMEM_ID_ROOT		0xff4007ff
+#define CBMEM_ID_SMBIOS         0x534d4254
+#define CBMEM_ID_SMM_SAVE_SPACE	0x07e9acee
+#define CBMEM_ID_SPINTABLE	0x59175917
+#define CBMEM_ID_STAGEx_META	0x57a9e000
+#define CBMEM_ID_STAGEx_CACHE	0x57a9e100
+#define CBMEM_ID_TCPA_LOG	0x54435041
+#define CBMEM_ID_TIMESTAMP	0x54494d45
+#define CBMEM_ID_VBOOT_HANDOFF	0x780074f0
+#define CBMEM_ID_VBOOT_WORKBUF	0x78007343
+#define CBMEM_ID_WIFI_CALIBRATION 0x57494649
+
+#define CBMEM_ID_TO_NAME_TABLE				 \
+	{ CBMEM_ID_ACPI,		"ACPI       " }, \
+	{ CBMEM_ID_ACPI_GNVS,		"ACPI GNVS  " }, \
+	{ CBMEM_ID_ACPI_GNVS_PTR,	"GNVS PTR   " }, \
+	{ CBMEM_ID_AGESA_RUNTIME,	"AGESA RSVD " }, \
+	{ CBMEM_ID_AMDMCT_MEMINFO,	"AMDMEM INFO" }, \
+	{ CBMEM_ID_CAR_GLOBALS,		"CAR GLOBALS" }, \
+	{ CBMEM_ID_CBTABLE,		"COREBOOT   " }, \
+	{ CBMEM_ID_CONSOLE,		"CONSOLE    " }, \
+	{ CBMEM_ID_COVERAGE,		"COVERAGE   " }, \
+	{ CBMEM_ID_EHCI_DEBUG,		"USBDEBUG   " }, \
+	{ CBMEM_ID_ELOG,		"ELOG       " }, \
+	{ CBMEM_ID_FREESPACE,		"FREE SPACE " }, \
+	{ CBMEM_ID_FSP_RESERVED_MEMORY, "FSP MEMORY " }, \
+	{ CBMEM_ID_FSP_RUNTIME,		"FSP RUNTIME" }, \
+	{ CBMEM_ID_GDT,			"GDT        " }, \
+	{ CBMEM_ID_IMD_ROOT,		"IMD ROOT   " }, \
+	{ CBMEM_ID_IMD_SMALL,		"IMD SMALL  " }, \
+	{ CBMEM_ID_MEMINFO,		"MEM INFO   " }, \
+	{ CBMEM_ID_MPTABLE,		"SMP TABLE  " }, \
+	{ CBMEM_ID_MRCDATA,		"MRC DATA   " }, \
+	{ CBMEM_ID_MTC,			"MTC        " }, \
+	{ CBMEM_ID_PIRQ,		"IRQ TABLE  " }, \
+	{ CBMEM_ID_POWER_STATE,		"POWER STATE" }, \
+	{ CBMEM_ID_RAM_OOPS,		"RAMOOPS    " }, \
+	{ CBMEM_ID_RAMSTAGE_CACHE,	"RAMSTAGE $ " }, \
+	{ CBMEM_ID_RAMSTAGE,		"RAMSTAGE   " }, \
+	{ CBMEM_ID_REFCODE_CACHE,	"REFCODE $  " }, \
+	{ CBMEM_ID_REFCODE,		"REFCODE    " }, \
+	{ CBMEM_ID_RESUME,		"ACPI RESUME" }, \
+	{ CBMEM_ID_RESUME_SCRATCH,	"ACPISCRATCH" }, \
+	{ CBMEM_ID_ROMSTAGE_INFO,	"ROMSTAGE   " }, \
+	{ CBMEM_ID_ROMSTAGE_RAM_STACK,	"ROMSTG STCK" }, \
+	{ CBMEM_ID_ROOT,		"CBMEM ROOT " }, \
+	{ CBMEM_ID_SMBIOS,		"SMBIOS     " }, \
+	{ CBMEM_ID_SMM_SAVE_SPACE,	"SMM BACKUP " }, \
+	{ CBMEM_ID_SPINTABLE,		"SPIN TABLE " }, \
+	{ CBMEM_ID_TCPA_LOG,		"TCPA LOG   " }, \
+	{ CBMEM_ID_TIMESTAMP,		"TIME STAMP " }, \
+	{ CBMEM_ID_VBOOT_HANDOFF,	"VBOOT      " }, \
+	{ CBMEM_ID_VBOOT_WORKBUF,	"VBOOT WORK " }, \
+	{ CBMEM_ID_WIFI_CALIBRATION,	"WIFI CLBR  " },
+#endif /* _CBMEM_ID_H_ */
diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h
new file mode 100644
index 0000000000..2ed4d7f277
--- /dev/null
+++ b/src/commonlib/include/commonlib/coreboot_tables.h
@@ -0,0 +1,387 @@
+#ifndef COMMONLIB_COREBOOT_TABLES_H
+#define COMMONLIB_COREBOOT_TABLES_H
+
+#include <stdint.h>
+
+/* The coreboot table information is for conveying information
+ * from the firmware to the loaded OS image.  Primarily this
+ * is expected to be information that cannot be discovered by
+ * other means, such as querying the hardware directly.
+ *
+ * All of the information should be Position Independent Data.
+ * That is it should be safe to relocated any of the information
+ * without it's meaning/correctness changing.   For table that
+ * can reasonably be used on multiple architectures the data
+ * size should be fixed.  This should ease the transition between
+ * 32 bit and 64 bit architectures etc.
+ *
+ * The completeness test for the information in this table is:
+ * - Can all of the hardware be detected?
+ * - Are the per motherboard constants available?
+ * - Is there enough to allow a kernel to run that was written before
+ *   a particular motherboard is constructed? (Assuming the kernel
+ *   has drivers for all of the hardware but it does not have
+ *   assumptions on how the hardware is connected together).
+ *
+ * With this test it should be straight forward to determine if a
+ * table entry is required or not.  This should remove much of the
+ * long term compatibility burden as table entries which are
+ * irrelevant or have been replaced by better alternatives may be
+ * dropped.  Of course it is polite and expedite to include extra
+ * table entries and be backwards compatible, but it is not required.
+ */
+
+/* Since coreboot is usually compiled 32bit, gcc will align 64bit
+ * types to 32bit boundaries. If the coreboot table is dumped on a
+ * 64bit system, a uint64_t would be aligned to 64bit boundaries,
+ * breaking the table format.
+ *
+ * lb_uint64 will keep 64bit coreboot table values aligned to 32bit
+ * to ensure compatibility. They can be accessed with the two functions
+ * below: unpack_lb64() and pack_lb64()
+ *
+ * See also: util/lbtdump/lbtdump.c
+ */
+
+struct lb_uint64 {
+	uint32_t lo;
+	uint32_t hi;
+};
+
+static inline uint64_t unpack_lb64(struct lb_uint64 value)
+{
+	uint64_t result;
+	result = value.hi;
+	result = (result << 32) + value.lo;
+	return result;
+}
+
+static inline struct lb_uint64 pack_lb64(uint64_t value)
+{
+	struct lb_uint64 result;
+	result.lo = (value >> 0) & 0xffffffff;
+	result.hi = (value >> 32) & 0xffffffff;
+	return result;
+}
+
+struct lb_header
+{
+	uint8_t  signature[4]; /* LBIO */
+	uint32_t header_bytes;
+	uint32_t header_checksum;
+	uint32_t table_bytes;
+	uint32_t table_checksum;
+	uint32_t table_entries;
+};
+
+/* Every entry in the boot environment list will correspond to a boot
+ * info record.  Encoding both type and size.  The type is obviously
+ * so you can tell what it is.  The size allows you to skip that
+ * boot environment record if you don't know what it is.  This allows
+ * forward compatibility with records not yet defined.
+ */
+struct lb_record {
+	uint32_t tag;		/* tag ID */
+	uint32_t size;		/* size of record (in bytes) */
+};
+
+#define LB_TAG_UNUSED		0x0000
+
+#define LB_TAG_MEMORY		0x0001
+
+struct lb_memory_range {
+	struct lb_uint64 start;
+	struct lb_uint64 size;
+	uint32_t type;
+#define LB_MEM_RAM		 1	/* Memory anyone can use */
+#define LB_MEM_RESERVED		 2	/* Don't use this memory region */
+#define LB_MEM_ACPI		 3	/* ACPI Tables */
+#define LB_MEM_NVS		 4	/* ACPI NVS Memory */
+#define LB_MEM_UNUSABLE		 5	/* Unusable address space */
+#define LB_MEM_VENDOR_RSVD	 6	/* Vendor Reserved */
+#define LB_MEM_TABLE		16	/* Ram configuration tables are kept in */
+};
+
+struct lb_memory {
+	uint32_t tag;
+	uint32_t size;
+	struct lb_memory_range map[0];
+};
+
+#define LB_TAG_HWRPB		0x0002
+struct lb_hwrpb {
+	uint32_t tag;
+	uint32_t size;
+	uint64_t hwrpb;
+};
+
+#define LB_TAG_MAINBOARD	0x0003
+struct lb_mainboard {
+	uint32_t tag;
+	uint32_t size;
+	uint8_t  vendor_idx;
+	uint8_t  part_number_idx;
+	uint8_t  strings[0];
+};
+
+#define LB_TAG_VERSION		0x0004
+#define LB_TAG_EXTRA_VERSION	0x0005
+#define LB_TAG_BUILD		0x0006
+#define LB_TAG_COMPILE_TIME	0x0007
+#define LB_TAG_COMPILE_BY	0x0008
+#define LB_TAG_COMPILE_HOST	0x0009
+#define LB_TAG_COMPILE_DOMAIN	0x000a
+#define LB_TAG_COMPILER		0x000b
+#define LB_TAG_LINKER		0x000c
+#define LB_TAG_ASSEMBLER	0x000d
+struct lb_string {
+	uint32_t tag;
+	uint32_t size;
+	uint8_t  string[0];
+};
+
+#define LB_TAG_VERSION_TIMESTAMP	0x0026
+struct lb_timestamp {
+	uint32_t tag;
+	uint32_t size;
+	uint32_t timestamp;
+};
+
+
+/* 0xe is taken by v3 */
+
+#define LB_TAG_SERIAL		0x000f
+struct lb_serial {
+	uint32_t tag;
+	uint32_t size;
+#define LB_SERIAL_TYPE_IO_MAPPED     1
+#define LB_SERIAL_TYPE_MEMORY_MAPPED 2
+	uint32_t type;
+	uint32_t baseaddr;
+	uint32_t baud;
+	uint32_t regwidth;
+};
+
+#define LB_TAG_CONSOLE		0x0010
+struct lb_console {
+	uint32_t tag;
+	uint32_t size;
+	uint16_t type;
+};
+
+#define LB_TAG_CONSOLE_SERIAL8250	0
+#define LB_TAG_CONSOLE_VGA		1 // OBSOLETE
+#define LB_TAG_CONSOLE_BTEXT		2 // OBSOLETE
+#define LB_TAG_CONSOLE_LOGBUF		3 // OBSOLETE
+#define LB_TAG_CONSOLE_SROM		4 // OBSOLETE
+#define LB_TAG_CONSOLE_EHCI		5
+#define LB_TAG_CONSOLE_SERIAL8250MEM	6
+
+#define LB_TAG_FORWARD		0x0011
+struct lb_forward {
+	uint32_t tag;
+	uint32_t size;
+	uint64_t forward;
+};
+
+#define LB_TAG_FRAMEBUFFER	0x0012
+struct lb_framebuffer {
+	uint32_t tag;
+	uint32_t size;
+
+	uint64_t physical_address;
+	uint32_t x_resolution;
+	uint32_t y_resolution;
+	uint32_t bytes_per_line;
+	uint8_t bits_per_pixel;
+	uint8_t red_mask_pos;
+	uint8_t red_mask_size;
+	uint8_t green_mask_pos;
+	uint8_t green_mask_size;
+	uint8_t blue_mask_pos;
+	uint8_t blue_mask_size;
+	uint8_t reserved_mask_pos;
+	uint8_t reserved_mask_size;
+};
+
+#define LB_TAG_GPIO	0x0013
+
+struct lb_gpio {
+	uint32_t port;
+	uint32_t polarity;
+#define ACTIVE_LOW	0
+#define ACTIVE_HIGH	1
+	uint32_t value;
+#define GPIO_MAX_NAME_LENGTH 16
+        uint8_t name[GPIO_MAX_NAME_LENGTH];
+};
+
+struct lb_gpios {
+	uint32_t tag;
+	uint32_t size;
+
+	uint32_t count;
+	struct lb_gpio gpios[0];
+};
+
+#define LB_TAG_VDAT		0x0015
+#define LB_TAG_VBNV		0x0019
+#define LB_TAB_VBOOT_HANDOFF	0x0020
+#define LB_TAB_DMA		0x0022
+#define LB_TAG_RAM_OOPS		0x0023
+#define LB_TAG_MTC		0x002b
+struct lb_range {
+	uint32_t tag;
+	uint32_t size;
+
+	uint64_t range_start;
+	uint32_t range_size;
+};
+
+void lb_ramoops(struct lb_header *header);
+
+#define LB_TAG_TIMESTAMPS	0x0016
+#define LB_TAG_CBMEM_CONSOLE	0x0017
+#define LB_TAG_MRC_CACHE	0x0018
+#define LB_TAG_ACPI_GNVS	0x0024
+#define LB_TAG_WIFI_CALIBRATION	0x0027
+struct lb_cbmem_ref {
+	uint32_t tag;
+	uint32_t size;
+
+	uint64_t cbmem_addr;
+};
+
+#define LB_TAG_X86_ROM_MTRR	0x0021
+struct lb_x86_rom_mtrr {
+	uint32_t tag;
+	uint32_t size;
+	/* The variable range MTRR index covering the ROM. */
+	uint32_t index;
+};
+
+#define LB_TAG_BOARD_ID		0x0025
+struct lb_board_id {
+	uint32_t tag;
+	uint32_t size;
+	/* Board ID as retrieved from the board revision GPIOs. */
+	uint32_t board_id;
+};
+
+#define LB_TAG_MAC_ADDRS	0x0026
+struct mac_address {
+	uint8_t mac_addr[6];
+	uint8_t pad[2];		/* Pad it to 8 bytes to keep it simple. */
+};
+
+struct lb_macs {
+	uint32_t tag;
+	uint32_t size;
+	uint32_t count;
+	struct mac_address mac_addrs[0];
+};
+
+#define LB_TAG_RAM_CODE		0x0028
+struct lb_ram_code {
+	uint32_t tag;
+	uint32_t size;
+	uint32_t ram_code;
+};
+
+#define LB_TAG_SPI_FLASH	0x0029
+struct lb_spi_flash {
+	uint32_t tag;
+	uint32_t size;
+	uint32_t flash_size;
+	uint32_t sector_size;
+	uint32_t erase_cmd;
+};
+
+#define LB_TAG_BOOT_MEDIA_PARAMS 0x0030
+struct lb_boot_media_params {
+	uint32_t tag;
+	uint32_t size;
+	/* offsets are relative to start of boot media */
+	uint64_t fmap_offset;
+	uint64_t cbfs_offset;
+	uint64_t cbfs_size;
+	uint64_t boot_media_size;
+};
+
+#define LB_TAG_SERIALNO		0x002a
+#define MAX_SERIALNO_LENGTH	32
+
+/* The following structures are for the cmos definitions table */
+#define LB_TAG_CMOS_OPTION_TABLE 200
+/* cmos header record */
+struct cmos_option_table {
+	uint32_t tag;               /* CMOS definitions table type */
+	uint32_t size;               /* size of the entire table */
+	uint32_t header_length;      /* length of header */
+};
+
+/* cmos entry record
+        This record is variable length.  The name field may be
+        shorter than CMOS_MAX_NAME_LENGTH. The entry may start
+        anywhere in the byte, but can not span bytes unless it
+        starts at the beginning of the byte and the length is
+        fills complete bytes.
+*/
+#define LB_TAG_OPTION 201
+struct cmos_entries {
+	uint32_t tag;                /* entry type */
+	uint32_t size;               /* length of this record */
+	uint32_t bit;                /* starting bit from start of image */
+	uint32_t length;             /* length of field in bits */
+	uint32_t config;             /* e=enumeration, h=hex, r=reserved */
+	uint32_t config_id;          /* a number linking to an enumeration record */
+#define CMOS_MAX_NAME_LENGTH 32
+	uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii,
+					       variable length int aligned */
+};
+
+
+/* cmos enumerations record
+        This record is variable length.  The text field may be
+        shorter than CMOS_MAX_TEXT_LENGTH.
+*/
+#define LB_TAG_OPTION_ENUM 202
+struct cmos_enums {
+	uint32_t tag;		     /* enumeration type */
+	uint32_t size; 		     /* length of this record */
+	uint32_t config_id;          /* a number identifying the config id */
+	uint32_t value;              /* the value associated with the text */
+#define CMOS_MAX_TEXT_LENGTH 32
+	uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii,
+						variable length int aligned */
+};
+
+/* cmos defaults record
+        This record contains default settings for the cmos ram.
+*/
+#define LB_TAG_OPTION_DEFAULTS 203
+struct cmos_defaults {
+	uint32_t tag;                /* default type */
+	uint32_t size;               /* length of this record */
+	uint32_t name_length;        /* length of the following name field */
+	uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name identifying the default */
+#define CMOS_IMAGE_BUFFER_SIZE 256
+	uint8_t default_set[CMOS_IMAGE_BUFFER_SIZE]; /* default settings */
+};
+
+#define LB_TAG_OPTION_CHECKSUM 204
+struct	cmos_checksum {
+	uint32_t tag;
+	uint32_t size;
+	/* In practice everything is byte aligned, but things are measured
+	 * in bits to be consistent.
+	 */
+	uint32_t range_start;	/* First bit that is checksummed (byte aligned) */
+	uint32_t range_end;	/* Last bit that is checksummed (byte aligned) */
+	uint32_t location;	/* First bit of the checksum (byte aligned) */
+	uint32_t type;		/* Checksum algorithm that is used */
+#define CHECKSUM_NONE	0
+#define CHECKSUM_PCBIOS	1
+};
+
+#endif
diff --git a/src/commonlib/include/commonlib/fmap_serialized.h b/src/commonlib/include/commonlib/fmap_serialized.h
new file mode 100644
index 0000000000..3585f0bc84
--- /dev/null
+++ b/src/commonlib/include/commonlib/fmap_serialized.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright 2010, Google Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *    * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *    * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following disclaimer
+ * in the documentation and/or other materials provided with the
+ * distribution.
+ *    * Neither the name of Google Inc. nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ */
+
+#ifndef FLASHMAP_SERIALIZED_H__
+#define FLASHMAP_SERIALIZED_H__
+
+#include <stdint.h>
+
+#define FMAP_SIGNATURE		"__FMAP__"
+#define FMAP_VER_MAJOR		1	/* this header's FMAP minor version */
+#define FMAP_VER_MINOR		1	/* this header's FMAP minor version */
+#define FMAP_STRLEN		32	/* maximum length for strings, */
+					/* including null-terminator */
+
+enum fmap_flags {
+	FMAP_AREA_STATIC	= 1 << 0,
+	FMAP_AREA_COMPRESSED	= 1 << 1,
+	FMAP_AREA_RO		= 1 << 2,
+};
+
+/* Mapping of volatile and static regions in firmware binary */
+struct fmap_area {
+	uint32_t offset;                /* offset relative to base */
+	uint32_t size;                  /* size in bytes */
+	uint8_t  name[FMAP_STRLEN];     /* descriptive name */
+	uint16_t flags;                 /* flags for this area */
+}  __attribute__((packed));
+
+struct fmap {
+	uint8_t  signature[8];		/* "__FMAP__" (0x5F5F464D41505F5F) */
+	uint8_t  ver_major;		/* major version */
+	uint8_t  ver_minor;		/* minor version */
+	uint64_t base;			/* address of the firmware binary */
+	uint32_t size;			/* size of firmware binary in bytes */
+	uint8_t  name[FMAP_STRLEN];	/* name of this firmware binary */
+	uint16_t nareas;		/* number of areas described by
+					   fmap_areas[] below */
+	struct fmap_area areas[];
+} __attribute__((packed));
+
+#endif	/* FLASHMAP_SERIALIZED_H__ */
diff --git a/src/commonlib/include/commonlib/helpers.h b/src/commonlib/include/commonlib/helpers.h
new file mode 100644
index 0000000000..6ad767e219
--- /dev/null
+++ b/src/commonlib/include/commonlib/helpers.h
@@ -0,0 +1,51 @@
+#ifndef COMMONLIB_HELPERS_H
+#define COMMONLIB_HELPERS_H
+/* This file is for helpers for both coreboot firmware and its utilities. */
+
+#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
+
+#define ALIGN(x,a)              __ALIGN_MASK(x,(typeof(x))(a)-1UL)
+#define __ALIGN_MASK(x,mask)    (((x)+(mask))&~(mask))
+#define ALIGN_UP(x,a)           ALIGN((x),(a))
+#define ALIGN_DOWN(x,a)         ((x) & ~((typeof(x))(a)-1UL))
+#define IS_ALIGNED(x,a)         (((x) & ((typeof(x))(a)-1UL)) == 0)
+
+#define MIN(a,b) ((a) < (b) ? (a) : (b))
+#define MAX(a,b) ((a) > (b) ? (a) : (b))
+#define ABS(a) (((a) < 0) ? (-(a)) : (a))
+#define CEIL_DIV(a, b)  (((a) + (b) - 1) / (b))
+#define IS_POWER_OF_2(x)  (((x) & ((x) - 1)) == 0)
+
+/* Standard units. */
+#define KiB (1<<10)
+#define MiB (1<<20)
+#define GiB (1<<30)
+/* Could we ever run into this one? I hope we get this much memory! */
+#define TiB (1<<40)
+
+#define KHz (1000)
+#define MHz (1000 * KHz)
+#define GHz (1000 * MHz)
+
+#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
+
+#if !defined(__clang__)
+#define check_member(structure, member, offset) _Static_assert( \
+	offsetof(struct structure, member) == offset, \
+	"`struct " #structure "` offset for `" #member "` is not " #offset )
+#else
+#define check_member(structure, member, offset)
+#endif
+
+/**
+ * container_of - cast a member of a structure out to the containing structure
+ * @param ptr:    the pointer to the member.
+ * @param type:   the type of the container struct this is embedded in.
+ * @param member: the name of the member within the struct.
+ *
+ */
+#define container_of(ptr, type, member) ({			\
+	const typeof( ((type *)0)->member ) *__mptr = (ptr);	\
+	(type *)( (char *)__mptr - offsetof(type,member) );})
+
+#endif /* COMMONLIB_HELPERS_H */
diff --git a/src/commonlib/include/commonlib/loglevel.h b/src/commonlib/include/commonlib/loglevel.h
new file mode 100644
index 0000000000..e147490f7b
--- /dev/null
+++ b/src/commonlib/include/commonlib/loglevel.h
@@ -0,0 +1,178 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Nicholas Sielicki <sielicki@nicky.io>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef LOGLEVEL_H
+#define LOGLEVEL_H
+
+/**
+ * @file loglevel.h
+ *
+ * \brief Definitions of the log levels to be used in printk calls.
+ *
+ * Safe for inclusion in assembly.
+ *
+ */
+
+/**
+ * \brief BIOS_EMERG - Emergency / Fatal
+ *
+ * Log level for when the system is entirely unusable. To be used when execution
+ * is halting as a result of the failure. No further instructions should run.
+ *
+ * Example - End of all debug output / death notice.
+ *
+ * @{
+ */
+#define BIOS_EMERG      0
+/** @} */
+
+/**
+ * \brief BIOS_ALERT - Dying / Unrecoverable
+ *
+ * Log level for when the system is certainly in the process of dying.
+ * To be used when execution will eventually halt as a result of the
+ * failure, but the system can still output valuable debugging
+ * information.
+ *
+ * Example - Ram initialization fails, dumping relevant POST codes and
+ * information
+ *
+ * @{
+ */
+#define BIOS_ALERT      1
+/** @} */
+
+/**
+ * \brief BIOS_CRIT - Recovery unlikely
+ *
+ * Log level for when the system has experienced a dire issue in essential
+ * components. To be used when boot will probably be unsuccessful as a
+ * result of the failure, but recovery/retry can be attempted.
+ *
+ * Example - MSR failures, SMM/SMI failures.
+ * or
+ *
+ * @{
+ */
+#define BIOS_CRIT       2
+/** @} */
+
+/**
+ * \brief BIOS_ERR - System in incomplete state.
+ *
+ * Log level for when the system has experienced an issue that may not preclude
+ * a successful boot. To be used when coreboot execution may still succeed,
+ * but the error places some non-essential portion of the machine in a broken
+ * state that will be noticed downstream.
+ *
+ * Example - Payload could still load, but will be missing access to integral
+ * components such as drives.
+ *
+ * @{
+ */
+#define BIOS_ERR        3
+/** @} */
+
+/**
+ * \brief BIOS_WARNING - Bad configuration
+ *
+ * Log level for when the system has noticed an issue that most likely will
+ * not preclude a successful boot. To be used when something is wrong, and
+ * would likely be noticed by an end user.
+ *
+ * Example - Bad ME firmware, bad microcode, mis-clocked CPU
+ *
+ * @{
+ */
+#define BIOS_WARNING    4
+/** @} */
+
+/**
+ * \brief BIOS_NOTICE - Unexpected but relatively insignificant
+ *
+ * Log level for when the system has noticed an issue that is an edge case,
+ * but is handled and is recoverable. To be used when an end-user would likely
+ * not notice.
+ *
+ * Example - Hardware was misconfigured, but is promptly fixed.
+ *
+ * @{
+ */
+#define BIOS_NOTICE     5
+/** @} */
+
+/**
+ * \brief BIOS_INFO - Expected events.
+ *
+ * Log level for when the system has experienced some typical event.
+ * Messages should be superficial in nature.
+ *
+ * Example - Success messages. Status messages.
+ *
+ * @{
+ */
+#define BIOS_INFO       6
+/** @} */
+
+/**
+ * \brief BIOS_DEBUG - Verbose output
+ *
+ * Log level for details of a method. Messages may be dense,
+ * but should not be excessive. Messages should be detailed enough
+ * that this level provides sufficient details to diagnose a problem,
+ * but not necessarily enough to fix it.
+ *
+ * Example - Printing of important variables.
+ *
+ * @{
+ */
+#define BIOS_DEBUG      7
+/** @} */
+
+/**
+ * \brief BIOS_SPEW - Excessively verbose output
+ *
+ * Log level for intricacies of a method. Messages might contain raw
+ * data and will produce large logs. Developers should try to make sure
+ * that this level is not useful to anyone besides developers.
+ *
+ * Example - Data dumps.
+ *
+ * @{
+ */
+#define BIOS_SPEW       8
+/** @} */
+
+/**
+ * \brief BIOS_NEVER - Muted log level.
+ *
+ * Roughly equal to commenting out a printk statement. Because a user
+ * should not set their log level higher than 8, these statements
+ * are never printed.
+ *
+ * Example - A developer might locally define MY_LOGLEVEL to BIOS_SPEW,
+ * and later replace it with BIOS_NEVER as to mute their debug output.
+ *
+ * @{
+ */
+#define BIOS_NEVER	9
+/** @} */
+
+#endif /* LOGLEVEL_H */
diff --git a/src/commonlib/include/commonlib/mem_pool.h b/src/commonlib/include/commonlib/mem_pool.h
new file mode 100644
index 0000000000..c57b70761e
--- /dev/null
+++ b/src/commonlib/include/commonlib/mem_pool.h
@@ -0,0 +1,73 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef _MEM_POOL_H_
+#define _MEM_POOL_H_
+
+#include <stddef.h>
+#include <stdint.h>
+
+/*
+ * The memory pool allows one to allocate memory from a fixed size buffer
+ * that also allows freeing semantics for reuse. However, the current
+ * limitation is that the most recent allocation is the only one that
+ * can be freed. If one tries to free any allocation that isn't the
+ * most recently allocated it will result in a leak within the memory pool.
+ *
+ * The memory returned by allocations are at least 8 byte aligned. Note
+ * that this requires the backing buffer to start on at least an 8 byte
+ * alignment.
+ */
+
+struct mem_pool {
+	uint8_t *buf;
+	size_t size;
+	uint8_t *last_alloc;
+	size_t free_offset;
+};
+
+#define MEM_POOL_INIT(buf_, size_)	\
+	{				\
+		.buf = (buf_),		\
+		.size = (size_),	\
+		.last_alloc = NULL,	\
+		.free_offset = 0,	\
+	}
+
+static inline void mem_pool_reset(struct mem_pool *mp)
+{
+	mp->last_alloc = NULL;
+	mp->free_offset = 0;
+}
+
+/* Initialize a memory pool. */
+static inline void mem_pool_init(struct mem_pool *mp, void *buf, size_t sz)
+{
+	mp->buf = buf;
+	mp->size = sz;
+	mem_pool_reset(mp);
+}
+
+/* Allocate requested size from the memory pool. NULL returned on error. */
+void *mem_pool_alloc(struct mem_pool *mp, size_t sz);
+
+/* Free allocation from memory pool. */
+void mem_pool_free(struct mem_pool *mp, void *alloc);
+
+#endif /* _MEM_POOL_H_ */
diff --git a/src/commonlib/include/commonlib/region.h b/src/commonlib/include/commonlib/region.h
new file mode 100644
index 0000000000..d3e7ebdfff
--- /dev/null
+++ b/src/commonlib/include/commonlib/region.h
@@ -0,0 +1,157 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef _REGION_H_
+#define _REGION_H_
+
+#include <stdint.h>
+#include <stddef.h>
+#include <commonlib/mem_pool.h>
+
+/*
+ * Region support.
+ *
+ * Regions are intended to abstract away the access mechanisms for blocks of
+ * data. This could be SPI, eMMC, or a memory region as the backing store.
+ * They are accessed through a region_device.  Subregions can be made by
+ * chaining together multiple region_devices.
+ */
+
+struct region_device;
+
+/*
+ * Returns NULL on error otherwise a buffer is returned with the conents of
+ * the requested data at offset of size.
+ */
+void *rdev_mmap(const struct region_device *rd, size_t offset, size_t size);
+
+/* Unmap a previously mapped area. Returns 0 on success, < 0 on error. */
+int rdev_munmap(const struct region_device *rd, void *mapping);
+
+/*
+ * Returns < 0 on error otherwise returns size of data read at provided
+ * offset filling in the buffer passed.
+ */
+ssize_t rdev_readat(const struct region_device *rd, void *b, size_t offset,
+			size_t size);
+
+
+/****************************************
+ *  Implementation of a region device   *
+ ****************************************/
+
+/*
+ * Create a child region of the parent provided the sub-region is within
+ * the parent's region. Returns < 0 on error otherwise 0 on success. Note
+ * that the child device only calls through the parent's operations.
+ */
+int rdev_chain(struct region_device *child, const struct region_device *parent,
+		size_t offset, size_t size);
+
+
+/* A region_device operations. */
+struct region_device_ops {
+	void *(*mmap)(const struct region_device *, size_t, size_t);
+	int (*munmap)(const struct region_device *, void *);
+	ssize_t (*readat)(const struct region_device *, void *, size_t, size_t);
+};
+
+struct region {
+	size_t offset;
+	size_t size;
+};
+
+struct region_device {
+	const struct region_device *root;
+	const struct region_device_ops *ops;
+	struct region region;
+};
+
+#define REGION_DEV_INIT(ops_, offset_, size_)		\
+	{						\
+		.root = NULL,				\
+		.ops = (ops_),				\
+		.region = {				\
+			.offset = (offset_),		\
+			.size = (size_),		\
+		},					\
+	}
+
+static inline size_t region_offset(const struct region *r)
+{
+	return r->offset;
+}
+
+static inline size_t region_sz(const struct region *r)
+{
+	return r->size;
+}
+
+static inline size_t region_device_sz(const struct region_device *rdev)
+{
+	return region_sz(&rdev->region);
+}
+
+static inline size_t region_device_offset(const struct region_device *rdev)
+{
+	return region_offset(&rdev->region);
+}
+
+/* Memory map entire region device. Same semantics as rdev_mmap() above. */
+static inline void *rdev_mmap_full(const struct region_device *rd)
+{
+	return rdev_mmap(rd, 0, region_device_sz(rd));
+}
+
+struct mem_region_device {
+	char *base;
+	struct region_device rdev;
+};
+
+/* Iniitalize at runtime a mem_region_device. This would be used when
+ * the base and size are dynamic or can't be known during linking. */
+void mem_region_device_init(struct mem_region_device *mdev, void *base,
+				size_t size);
+
+extern const struct region_device_ops mem_rdev_ops;
+
+/* Statically initialize mem_region_device. */
+#define MEM_REGION_DEV_INIT(base_, size_)				\
+	{								\
+		.base = (void *)(base_),				\
+		.rdev = REGION_DEV_INIT(&mem_rdev_ops, 0, (size_)),	\
+	}
+
+struct mmap_helper_region_device {
+	struct mem_pool pool;
+	struct region_device rdev;
+};
+
+#define MMAP_HELPER_REGION_INIT(ops_, offset_, size_) \
+	{								\
+		.rdev = REGION_DEV_INIT((ops_), (offset_), (size_)),	\
+	}
+
+void mmap_helper_device_init(struct mmap_helper_region_device *mdev,
+				void *cache, size_t cache_size);
+
+void *mmap_helper_rdev_mmap(const struct region_device *, size_t, size_t);
+int mmap_helper_rdev_munmap(const struct region_device *, void *);
+
+#endif /* _REGION_H_ */
diff --git a/src/commonlib/include/commonlib/rmodule-defs.h b/src/commonlib/include/commonlib/rmodule-defs.h
new file mode 100644
index 0000000000..d61837f67d
--- /dev/null
+++ b/src/commonlib/include/commonlib/rmodule-defs.h
@@ -0,0 +1,63 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+#ifndef RMODULE_DEFS_H
+#define RMODULE_DEFS_H
+
+#include <stdint.h>
+#include <stddef.h>
+
+#define RMODULE_MAGIC 0xf8fe
+#define RMODULE_VERSION_1 1
+
+/* All fields with '_offset' in the name are byte offsets into the flat blob.
+ * The linker and the linker script takes are of assigning the values.  */
+struct rmodule_header {
+	uint16_t magic;
+	uint8_t  version;
+	uint8_t  type;
+	/* The payload represents the program's loadable code and data. */
+	uint32_t payload_begin_offset;
+	uint32_t payload_end_offset;
+	/* Begin and of relocation information about the program module. */
+	uint32_t relocations_begin_offset;
+	uint32_t relocations_end_offset;
+	/* The starting address of the linked program. This address is vital
+	 * for determining relocation offsets as the relocation info and other
+	 * symbols (bss, entry point) need this value as a basis to calculate
+	 * the offsets.
+	 */
+	uint32_t module_link_start_address;
+	/* The module_program_size is the size of memory used while running
+	 * the program. The program is assumed to consume a contiguous amount
+	 * of memory. */
+	uint32_t module_program_size;
+	/* This is program's execution entry point. */
+	uint32_t module_entry_point;
+	/* Optional parameter structure that can be used to pass data into
+	 * the module. */
+	uint32_t parameters_begin;
+	uint32_t parameters_end;
+	/* BSS section information so the loader can clear the bss. */
+	uint32_t bss_begin;
+	uint32_t bss_end;
+	/* Add some room for growth. */
+	uint32_t padding[4];
+} __attribute__ ((packed));
+
+#endif /* RMODULE_DEFS_H */
diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h
new file mode 100644
index 0000000000..8728caf39a
--- /dev/null
+++ b/src/commonlib/include/commonlib/timestamp_serialized.h
@@ -0,0 +1,92 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 The ChromiumOS Authors.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef __TIMESTAMP_SERIALIZED_H__
+#define __TIMESTAMP_SERIALIZED_H__
+
+#include <stdint.h>
+
+struct timestamp_entry {
+	uint32_t	entry_id;
+	uint64_t	entry_stamp;
+} __attribute__((packed));
+
+struct timestamp_table {
+	uint64_t	base_time;
+	uint16_t	max_entries;
+	uint16_t	tick_freq_mhz;
+	uint32_t	num_entries;
+	struct timestamp_entry entries[0]; /* Variable number of entries */
+} __attribute__((packed));
+
+enum timestamp_id {
+	TS_START_ROMSTAGE = 1,
+	TS_BEFORE_INITRAM = 2,
+	TS_AFTER_INITRAM = 3,
+	TS_END_ROMSTAGE = 4,
+	TS_START_VBOOT = 5,
+	TS_END_VBOOT = 6,
+	TS_START_COPYRAM = 8,
+	TS_END_COPYRAM = 9,
+	TS_START_RAMSTAGE = 10,
+	TS_START_BOOTBLOCK = 11,
+	TS_END_BOOTBLOCK = 12,
+	TS_START_COPYROM = 13,
+	TS_END_COPYROM = 14,
+	TS_START_ULZMA = 15,
+	TS_END_ULZMA = 16,
+	TS_DEVICE_ENUMERATE = 30,
+	TS_DEVICE_CONFIGURE = 40,
+	TS_DEVICE_ENABLE = 50,
+	TS_DEVICE_INITIALIZE = 60,
+	TS_DEVICE_DONE = 70,
+	TS_CBMEM_POST = 75,
+	TS_WRITE_TABLES = 80,
+	TS_LOAD_PAYLOAD = 90,
+	TS_ACPI_WAKE_JUMP = 98,
+	TS_SELFBOOT_JUMP = 99,
+
+	/* 500+ reserved for vendorcode extensions (500-600: google/chromeos) */
+	TS_START_COPYVER = 501,
+	TS_END_COPYVER = 502,
+	TS_START_TPMINIT = 503,
+	TS_END_TPMINIT = 504,
+	TS_START_VERIFY_SLOT = 505,
+	TS_END_VERIFY_SLOT = 506,
+	TS_START_HASH_BODY = 507,
+	TS_DONE_LOADING = 508,
+	TS_DONE_HASHING = 509,
+	TS_END_HASH_BODY = 510,
+
+	/* 950+ reserved for vendorcode extensions (950-999: intel/fsp) */
+	TS_FSP_MEMORY_INIT_START = 950,
+	TS_FSP_MEMORY_INIT_END = 951,
+	TS_FSP_TEMP_RAM_EXIT_START = 952,
+	TS_FSP_TEMP_RAM_EXIT_END = 953,
+	TS_FSP_SILICON_INIT_START = 954,
+	TS_FSP_SILICON_INIT_END = 955,
+	TS_FSP_BEFORE_ENUMERATE = 956,
+	TS_FSP_AFTER_ENUMERATE = 957,
+	TS_FSP_BEFORE_FINALIZE = 958,
+	TS_FSP_AFTER_FINALIZE = 959,
+
+	/* 1000+ reserved for payloads (1000-1200: ChromeOS depthcharge) */
+};
+
+#endif