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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-02-03 21:07:19 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-24 13:01:48 +0000 |
| commit | 23e3f9d6ed4f841f0c5222a2aa2cb586f2210d95 (patch) | |
| tree | 6aacd94841beb424d9f923a548db157c4c222215 /src/commonlib/include | |
| parent | 1b296ee3b832bc9dbff57c680a3de509db3c95fd (diff) | |
| download | coreboot-23e3f9d6ed4f841f0c5222a2aa2cb586f2210d95.tar.xz | |
src/commonlib: Fix typos
Change-Id: Ida1770c5e4b18c536e4943eb9cf862d69196c589
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38689
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/commonlib/include')
| -rw-r--r-- | src/commonlib/include/commonlib/storage.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/commonlib/include/commonlib/storage.h b/src/commonlib/include/commonlib/storage.h index 47a2bb6543..faba2fe5a9 100644 --- a/src/commonlib/include/commonlib/storage.h +++ b/src/commonlib/include/commonlib/storage.h @@ -57,7 +57,7 @@ #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ #define EXT_CSD_BUS_WIDTH_STROBE (1<<7) /* Enhanced strobe mode */ -#define EXT_CSD_TIMING_BC 0 /* Backwards compatility */ +#define EXT_CSD_TIMING_BC 0 /* Backwards compatibility */ #define EXT_CSD_TIMING_HS 1 /* High speed */ #define EXT_CSD_TIMING_HS200 2 /* HS200 */ #define EXT_CSD_TIMING_HS400 3 /* HS400 */ |