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| author | Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> | 2021-03-10 02:47:05 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-04-16 06:52:19 +0000 |
| commit | fff318fbce753e3148ae2d22f7518fb060d7a652 (patch) | |
| tree | effbf952cd4cf5c16df1b613a8a64f05dc4c09cb /src/commonlib | |
| parent | 23cc165d6a02020ff408bdcc56a07cd9dc9a2105 (diff) | |
| download | coreboot-fff318fbce753e3148ae2d22f7518fb060d7a652.tar.xz | |
soc/amd/cezanne: Update FADT to support S0i3
Set ACPI_FADT_LOW_PWR_IDLE_S0 flag in FADT.
BUG=b:178728116
TEST=Dump FACP and confirm Flags bits match expected.
Change-Id: I59ef762a18903135f9daa902ba8d1e40c451e96c
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Signed-off-by: Mathew King <mathewk@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52035
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/commonlib')
0 files changed, 0 insertions, 0 deletions