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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-09-12 20:21:28 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-10-20 16:46:07 +0000 |
| commit | 80df052d355ba2db3bb1b6e6e2c05d05a9ce6ad0 (patch) | |
| tree | ced11bee7f99a84c63c129fd9082c18d48beb95b /src/commonlib | |
| parent | 59e97b6378694d1807895c573624b7a2532bebfd (diff) | |
| download | coreboot-80df052d355ba2db3bb1b6e6e2c05d05a9ce6ad0.tar.xz | |
cbmem: Add IDs for TSEG and BERT table data
Prepare for products that can use any DRAM for TSEG.
Include an ID for data pointed to by an ACPI BERT table. This region's
only requirement is it is marked reserved.
Change-Id: Ia6518e881b0add71c622e65572474e0041f83d61
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36115
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/commonlib')
| -rw-r--r-- | src/commonlib/include/commonlib/cbmem_id.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/commonlib/include/commonlib/cbmem_id.h b/src/commonlib/include/commonlib/cbmem_id.h index 30bf88ada8..54a0dee55a 100644 --- a/src/commonlib/include/commonlib/cbmem_id.h +++ b/src/commonlib/include/commonlib/cbmem_id.h @@ -56,6 +56,8 @@ #define CBMEM_ID_ROMSTAGE_RAM_STACK 0x90357ac4 #define CBMEM_ID_ROOT 0xff4007ff #define CBMEM_ID_SMBIOS 0x534d4254 +#define CBMEM_ID_BERT_RAW_DATA 0x42455254 +#define CBMEM_ID_SMM_TSEG_SPACE 0x54534547 #define CBMEM_ID_SMM_SAVE_SPACE 0x07e9acee #define CBMEM_ID_STAGEx_META 0x57a9e000 #define CBMEM_ID_STAGEx_CACHE 0x57a9e100 @@ -119,6 +121,8 @@ { CBMEM_ID_ROMSTAGE_RAM_STACK, "ROMSTG STCK" }, \ { CBMEM_ID_ROOT, "CBMEM ROOT " }, \ { CBMEM_ID_SMBIOS, "SMBIOS " }, \ + { CBMEM_ID_BERT_RAW_DATA, "BERT DATA " }, \ + { CBMEM_ID_SMM_TSEG_SPACE, "TSEG " }, \ { CBMEM_ID_SMM_SAVE_SPACE, "SMM BACKUP " }, \ { CBMEM_ID_STORAGE_DATA, "SD/MMC/eMMC" }, \ { CBMEM_ID_TCPA_LOG, "TCPA LOG " }, \ |