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authorPatrick Georgi <patrick.georgi@coresystems.de>2009-10-04 12:30:44 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-10-04 12:30:44 +0000
commit5bb10282e978dd811246c921a16e535babfbac9a (patch)
treeec7ce3e7335b41ab657780a23cd57fb5e1b84fde /src/config/coreboot_ram.ld
parent0dd713330bb5fe6cca38b9165645535d5772192d (diff)
downloadcoreboot-5bb10282e978dd811246c921a16e535babfbac9a.tar.xz
This removes the uses of the buildrom utility and the coreboot.strip
intermediate file. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4718 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/config/coreboot_ram.ld')
-rw-r--r--src/config/coreboot_ram.ld2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/config/coreboot_ram.ld b/src/config/coreboot_ram.ld
index 2934b2e6e2..5e988ffeaf 100644
--- a/src/config/coreboot_ram.ld
+++ b/src/config/coreboot_ram.ld
@@ -57,7 +57,7 @@ SECTIONS
/*
* kevinh/Ispiri - Added an align, because the objcopy tool
* incorrectly converts sections that are not long word aligned.
- * This breaks the coreboot.strip target.
+ * This breaks the coreboot.rom target.
*/
. = ALIGN(4);