newconfig is no more.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 0 insertions, 1336 deletions

diff --git a/src/config/Config.lb b/src/config/Config.lb
deleted file mode 100644
index 082cf80a64..0000000000
--- a/src/config/Config.lb
+++ /dev/null
@@ -1,214 +0,0 @@
-## This is Architecture independant part of the makefile
-
-uses CONFIG_HAVE_OPTION_TABLE
-uses CONFIG_AP_CODE_IN_CAR
-uses CONFIG_ASSEMBLER_DEBUG
-
-makedefine CPP:= $(CC) -x assembler-with-cpp -DASSEMBLY -E
-makedefine LIBGCC_FILE_NAME := $(shell $(CC) -print-libgcc-file-name)
-makedefine GCC ?= $(CC)
-makedefine GCC_INC_DIR := $(shell LC_ALL=C $(GCC) -print-search-dirs | sed -ne "s/install: \(.*\)/\1include/gp")
-
-makedefine CPPFLAGS := -I$(TOP)/src/include -I$(TOP)/src/arch/$(CONFIG_ARCH)/include -I$(GCC_INC_DIR) $(CPUFLAGS)
-makedefine CFLAGS = $(CONFIG_CPU_OPT) $(DISTRO_CFLAGS) $(CPPFLAGS) -Os -nostdinc -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes -Wwrite-strings -Wredundant-decls -Wno-trigraphs -Werror-implicit-function-declaration -Wstrict-aliasing -Wshadow -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer -pipe
-
-if CONFIG_ASSEMBLER_DEBUG
-makedefine DEBUG_CFLAGS := -g -dA -fverbose-asm
-end
-
-makedefine HOSTCFLAGS:= -Os -Wall -Wstrict-prototypes -Wmissing-prototypes -Wredundant-decls -Wno-trigraphs -Werror-implicit-function-declaration -Wstrict-aliasing -Wshadow
-
-makerule ldscript.ld   
-	depends	"ldoptions $(LDSUBSCRIPTS-1)" 
-	action  "echo 'INCLUDE ldoptions' > $@; for file in $(LDSUBSCRIPTS-1) ; do echo /\* $$file \*/ >> $@; cat $$file >> $@ ; done"
-end
-
-#makerule cpuflags   
-#	depends	"Makefile.settings" 
-#	action	"perl -e 'print \"CPUFLAGS :=\n\"; foreach $$var (split(\" \", $$ENV{VARIABLES})) { if (exists($$ENV{$$var})) { print \"CPUFLAGS += -D$$var\" . (length($$ENV{$$var})?\"=\x27$$ENV{$$var}\x27\":\"\") .\"\n\"} else { print \"CPUFLAGS += -U$$var\n\"} }' > $@"
-#end
-
-#makerule ldoptions   
-#	depends	"Makefile.settings" 
-#	action	"perl -e 'foreach $$var (split(\" \", $$ENV{VARIABLES})) { if ($$ENV{$$var} =~ m/^(0x[0-9a-fA-F]+|0[0-7]+|[0-9]+)$$/) { print \"$$var = $$ENV{$$var};\n\"; }}' > $@"
-#end
-
-makerule coreboot.rom
-	depends	"coreboot" 
-	action	"$(CONFIG_OBJCOPY) -O binary coreboot coreboot.rom"
-end
-
-makerule coreboot.a
-        depends "$(OBJECTS)"
-        action  "rm -f coreboot.a"
-        action  "$(CONFIG_CROSS_COMPILE)ar cr coreboot.a $(OBJECTS)"
-end
-
-
-makerule coreboot_ram.o
-	depends	"src/arch/$(CONFIG_ARCH)/lib/c_start.o $(DRIVER) coreboot.a $(LIBGCC_FILE_NAME)" 
-	action	"$(CC) $(DISTRO_LFLAGS) -nostdlib -r -o $@ src/arch/$(CONFIG_ARCH)/lib/c_start.o $(DRIVER) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,-\( coreboot.a $(LIBGCC_FILE_NAME) -Wl,-\)"
-end
-
-makerule coreboot_ram
-	depends	"coreboot_ram.o $(TOP)/src/config/coreboot_ram.ld ldoptions" 
-	action	"$(CC) $(DISTRO_LFLAGS) -nostdlib -nostartfiles -static -o $@ -T $(TOP)/src/config/coreboot_ram.ld coreboot_ram.o"
-	action 	"$(CONFIG_CROSS_COMPILE)nm -n coreboot_ram | sort > coreboot_ram.map"
-end
-
-##
-## By default compress the part of coreboot that runs from RAM
-##
-makedefine COREBOOT_RAM-$(CONFIG_COMPRESS):=coreboot_ram.nrv2b
-makedefine COREBOOT_RAM-$(CONFIG_UNCOMPRESSED):=coreboot_ram.bin
-
-makerule coreboot_ram.bin 
-	depends	"coreboot_ram" 
-	action	"$(CONFIG_OBJCOPY) -O binary $< $@"
-end
-
-makerule coreboot_ram.nrv2b 
-	depends	"coreboot_ram.bin nrv2b" 
-	action	"./nrv2b e $< $@"
-end
-
-makerule coreboot_ram.rom
-	depends	"$(COREBOOT_RAM-1)" 
-	action	"cp $(COREBOOT_RAM-1) coreboot_ram.rom"
-end
-
-makedefine COREBOOT_APC:=
-
-if CONFIG_AP_CODE_IN_CAR
-	#for ap code in cache
-
-	makerule coreboot_apc.a
-		depends "apc_auto.o"
-		action  "rm -f coreboot_apc.a"
-		action  "$(CONFIG_CROSS_COMPILE)ar cr coreboot_apc.a apc_auto.o"
-	end
-
-	makerule coreboot_apc.o
-		depends "src/arch/$(CONFIG_ARCH)/lib/c_start.o coreboot_apc.a"
-        	action  "$(CC) $(DISTRO_LFLAGS) -nostdlib -r -o $@ $^"
-	end
-
-	makerule coreboot_apc
-		depends "coreboot_apc.o $(TOP)/src/config/coreboot_apc.ld ldoptions"
-		action  "$(CC) $(DISTRO_LFLAGS) -nostdlib -nostartfiles -static -o $@ -T $(TOP)/src/config/coreboot_apc.ld coreboot_apc.o"
-		action  "$(CONFIG_CROSS_COMPILE)nm -n coreboot_apc | sort > coreboot_apc.map"
-	end
-
-	##
-	## By default compress the part of coreboot that runs from cache as ram
-	##
-	makedefine COREBOOT_APC-$(CONFIG_COMPRESS):=coreboot_apc.nrv2b
-	makedefine COREBOOT_APC-$(CONFIG_UNCOMPRESSED):=coreboot_apc.bin
-
-	makerule coreboot_apc.bin
-		depends "coreboot_apc"
-		action  "$(CONFIG_OBJCOPY) -O binary $< $@"
-	end
-
-	makerule coreboot_apc.nrv2b
-        depends "coreboot_apc.bin nrv2b"
-        action  "./nrv2b e $< $@"
-	end
-
-	makerule coreboot_apc.rom
-		depends "$(COREBOOT_APC-1)"
-		action  "cp $(COREBOOT_APC-1) coreboot_apc.rom"
-	end
-
-	makedefine COREBOOT_APC:=coreboot_apc.rom
-
-end
-
-makedefine COREBOOT_RAM_ROM:=coreboot_ram.rom
-
-makerule coreboot   
-	depends	"crt0.o $(INIT-OBJECTS) $(COREBOOT_APC) $(COREBOOT_RAM_ROM) ldscript.ld"
-	action	"$(CC) $(DISTRO_LFLAGS) -nostdlib -nostartfiles -static -o $@ -T ldscript.ld crt0.o $(INIT-OBJECTS)"
-	action	"$(CONFIG_CROSS_COMPILE)nm -n coreboot | sort > coreboot.map"
-	action 	"$(CONFIG_CROSS_COMPILE)objdump -dS coreboot > coreboot.disasm"	
-end
-
-# Force crt0.s (which has build time version code in it to rebuild every time)
-makedefine .PHONY : crt0.s
-makerule crt0.s   
-	depends	"crt0.S $(CRT0_INCLUDES)" 
-	action	"$(CPP) $(CPPFLAGS) -I. -I$(TOP)/src  $< > $@.new && mv $@.new $@"
-end
-
-# generate an assembly listing via -a switch.
-makerule crt0.o  
-	depends	"crt0.s" 
-	action	"$(CC) -Wa,-acdlns -c $(CONFIG_CPU_OPT) -o $@ $< >crt0.disasm"
-end
-
-makerule etags   
-	depends	"$(SOURCES)" 
-	action	"etags $(SOURCES)"
-end
-makerule tags   
-	depends	"$(SOURCES)" 
-	action	"ctags $(SOURCES)"
-end
-makerule corebootDoc.config
-	depends	"$(TOP)/src/config/corebootDoc.config" 
-	action "cat $(TOP)/src/config/corebootDoc.config > corebootDoc.config"
-        action "echo 'INPUT=$(SOURCES)' >> corebootDoc.config"
-end
-makerule documentation   
-	depends	"corebootDoc.config"
-	action	"doxygen corebootDoc.config"
-end
-
-# Yes, the rule doesn't seem to make sense, but multiple images could try to
-# create a romcc binary at the same time, clobbering each other.
-# Our makefile architecture won't allow us to easily have the romcc target
-# in the main makefile, so keep it here and move the race condition winner
-# in place. That way, romcc may get compiled twice, but the binary will always
-# be in a correct and valid state if it exists because the move is atomic.
-makerule ../romcc   
-	depends	"$(TOP)/util/romcc/romcc.c" 
-	action	"$(HOSTCC) -g $(HOSTCFLAGS) $< -o romcc.tmpfile"
-	action	"mv romcc.tmpfile $@"
-end
-
-makerule build_opt_tbl   
-	depends	"$(TOP)/util/options/build_opt_tbl.c $(TOP)/src/include/pc80/mc146818rtc.h $(TOP)/src/include/boot/coreboot_tables.h Makefile.settings Makefile"
-	action	"$(HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) $< -o $@" 
-end
-
-makerule option_table.h option_table.c
-	depends	"build_opt_tbl $(CONFIG_MAINBOARD)/cmos.layout" 
-	action	"./build_opt_tbl --config $(CONFIG_MAINBOARD)/cmos.layout --header option_table.h --option option_table.c"
-end
-
-if CONFIG_HAVE_OPTION_TABLE
-object ./option_table.o 
-end
-
-makerule clean 
-	action  "rm -f $(OBJECTS)"
-	action  "rm -f $(DRIVER)"
-	action	"rm -f coreboot.* *~"
-	action	"rm -f coreboot"
-	action	"rm -f ldscript.ld"
-	action	"rm -f a.out *.s *.l *.o *.E *.inc"
-	action	"rm -f TAGS tags romcc*"
-	action	"rm -f docipl chips.c *chip.c coreboot_apc* coreboot_ram* coreboot_pay*"
-	action	"rm -f build_opt_tbl* nrv2b* option_table.c option_table.h crt0.S crt0.disasm"
-	action	"rm -f smm smm.elf smm.map smm_bin.c"
-	action	"rm -f dsdt.aml dsdt.c"
-	action	"rm -f payload"
-end
-
-# do standard config files that the user need not specify
-# for now, this is just 'lib', but it may be more later. 
-dir /lib
-dir /console
-dir /devices
-dir /pc80
-dir /boot
diff --git a/src/config/Options.lb b/src/config/Options.lb
deleted file mode 100644
index 9af3daf93d..0000000000
--- a/src/config/Options.lb
+++ /dev/null
@@ -1,1122 +0,0 @@
-#######################################################
-#
-# Main options file for coreboot
-#
-# Each option used by a part must be defined in
-# this file. The format for options is:
-#
-#   define <name> 
-#	default <expr> | {<expr>} | "<string>" | none
-#	format "<string>"
-#	export always | used | never
-#	comment "<string>"
-#   end
-#
-# where 
-#
-#   <name> is the name of the option
-#   <expr> is a numeric expression
-#   <string> is a string
-#
-# Either a default value or 'default none' must
-# be specified for every option. An option
-# specified as 'default none' will not be exported
-# (i.e. will remain undefined) unless it has
-# been assigned a value.
-#
-# Option values can be an immediate expression that 
-# evaluates to a numeric value, a delayed expression 
-# (surrounded by curley braces), or a string 
-# (surrounded by double quotes.)
-#
-# Immediate expressions are evaluated at the time an
-# option is defined or set and the numeric result 
-# becomes the value of the option.
-#
-# Delayed expression are evaluated at the time the 
-# option is used, either in another expression or 
-# when being exported.
-#
-# String values will have the double quotes removed 
-# automatically. 
-#
-# Format strings determine the print format that is 
-# used when exporting options. The default format
-# is "%s" for strings and "%d" for numbers.
-#
-# Exported options generate entries in the 
-# Makefile.settings file. Options can be always 
-# exported, exported only if used, or never exported.
-#
-# A comment string must be supplied for every option.
-#
-#######################################################
-
-###############################################
-# Architecture options
-###############################################
-
-define CONFIG_ARCH_X86
-	default 1
-	export always
-	comment "X86 is the default"
-end
-define CONFIG_ARCH
-	default "i386"
-	export always
-	comment "Default architecture is i386, options are alpha and ppc"
-end
-define CONFIG_HAVE_MOVNTI
-	default 0
-	export always
-	comment "This cpu supports the MOVNTI directive"
-end
-
-###############################################
-# Build options
-###############################################
-
-define CONFIG_CROSS_COMPILE
-	default ""
-	export always
-	comment "Cross compiler prefix"
-end
-define CC
-	default "$(CONFIG_CROSS_COMPILE)gcc"
-	export always
-	comment "Target C Compiler"
-end
-define HOSTCC
-	default "gcc"
-	export always
-	comment "Host C Compiler"
-end
-define CONFIG_CPU_OPT
-	default none
-	export used
-	comment "Additional per-cpu CFLAGS"
-end
-define CONFIG_OBJCOPY
-	default "$(CONFIG_CROSS_COMPILE)objcopy --gap-fill 0xff"
-	export always
-	comment "Objcopy command"
-end
-
-# Try to determine svn revision first.
-# If that fails, try last svn revision in git log.
-define COREBOOT_VERSION
-	default "2.0.0-r$(shell if [ -d $(TOP)/.svn -a -f `which svnversion` ]; then svnversion $(TOP); else if [ -d $(TOP)/.git -a -f `which git` ]; then git --git-dir=/$(TOP)/.git log|grep git-svn-id|cut -f 2 -d@|cut -f 1 -d' '|sort -g|tail -1; fi; fi)"
-	export always
-	format "\"%s\""
-	comment "coreboot version"
-end
-define COREBOOT_EXTRA_VERSION
-        default ""
-        export used
-	format "\"%s\""
-        comment "coreboot extra version"
-end
-define COREBOOT_BUILD
-	default "$(shell date)"
-	export always
-	format "\"%s\""
-	comment "Build date"
-end
-define COREBOOT_COMPILE_TIME
-	default "$(shell date +%T)"
-	export always
-	format "\"%s\""
-	comment "Build time"
-end
-define COREBOOT_COMPILE_BY
-	default "$(shell whoami)"
-	export always
-	format "\"%s\""
-	comment "Who build this image"
-end
-define COREBOOT_COMPILE_HOST
-	default "$(shell hostname)"
-	export always
-	format "\"%s\""
-	comment "Build host"
-end
-
-define COREBOOT_COMPILE_DOMAIN
-	default "$(shell dnsdomainname)"
-	export always
-	format "\"%s\""
-	comment "Build domain name"
-end
-define COREBOOT_COMPILER
-	default "$(shell $(CC) $(CFLAGS) -v 2>&1 | tail -1)"
-	export always
-	format "\"%s\""
-	comment "Build compiler"
-end
-define COREBOOT_LINKER
-	default "$(shell  $(CC) -Wl,--version 2>&1 | grep \" ld\")"
-	export always
-	format "\"%s\""
-	comment "Build linker"
-end
-define COREBOOT_ASSEMBLER
-	default "$(shell  touch dummy.s ; $(CC) -c -Wa,-v dummy.s 2>&1; rm -f dummy.s dummy.o )"
-	export always
-	format "\"%s\""
-	comment "Build assembler"
-end
-define CONFIG_CHIP_CONFIGURE
-	default 0
-	export used
-	comment "Use new chip_configure method for configuring (non-pci) devices"
-end
-define CONFIG_USE_INIT
-	default 0
-	export always
-	comment "Use stage 1 initialization code"
-end
-
-###############################################
-# ROM image options
-###############################################
-
-define CONFIG_HAVE_FALLBACK_BOOT
-	format "%d"
-	default 0
-	export always
-	comment "Set if fallback booting required"
-end
-define CONFIG_HAVE_FAILOVER_BOOT
-	format "%d"
-	default 0
-	export always
-	comment "Set if failover booting required"
-end
-define CONFIG_USE_FALLBACK_IMAGE
-	format "%d"
-	default 0
-	export used
-	comment "Set to build a fallback image"
-end
-define CONFIG_USE_FAILOVER_IMAGE
-        format "%d"
-        default 0
-        export used
-        comment "Set to build a failover image"
-end
-define CONFIG_FALLBACK_SIZE
-	default 65536
-	format "0x%x"
-	export used
-	comment "Default fallback image size"
-end
-define CONFIG_FAILOVER_SIZE
-        default 0
-        format "0x%x"
-        export used
-        comment "Default failover image size"
-end
-define CONFIG_ROM_SIZE
-	default none
-	format "0x%x"
-	export used
-	comment "Size of your ROM"
-end
-define CONFIG_ROM_IMAGE_SIZE
-	default 65535
-	format "0x%x"
-	export always
-	comment "Default image size"
-end
-define CONFIG_ROM_SECTION_SIZE
-	default {CONFIG_FALLBACK_SIZE}
-	format "0x%x"
-	export used
-	comment "Default rom section size"
-end
-define CONFIG_ROM_SECTION_OFFSET
-	default {CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE}
-	format "0x%x"
-	export used
-	comment "Default rom section offset"
-end
-define CONFIG_ROMBASE
-	default {0xffffffff - CONFIG_ROM_SIZE + 1}
-	format "0x%x"
-	export always
-	comment "Base address of coreboot in ROM"
-end
-define CONFIG_ROMSTART
-	default none
-	format "0x%x"
-	export used
-	comment "Start address of coreboot in ROM"
-end
-define CONFIG_RESET
-	default {CONFIG_ROMBASE}
-	format "0x%x"
-	export always
-	comment "Hardware reset vector address"
-end
-define CONFIG_STACK_SIZE
-	default 0x2000
-	format "0x%x"
-	export always
-	comment "Default stack size"
-end
-define CONFIG_HEAP_SIZE
-	default 0x2000
-	format "0x%x"
-	export always
-	comment "Default heap size"
-end
-define CONFIG_RAMBASE
-	default none
-	format "0x%x"
-	export always
-	comment "Base address of coreboot in RAM"
-end
-define CONFIG_RAMSTART
-	default none
-	format "0x%x"
-	export used
-	comment "Start address of coreboot in RAM"
-end
-define CONFIG_USE_DCACHE_RAM
-	default 0
-	export always
-	comment "Use data cache as temporary RAM if possible"
-end
-define CONFIG_DCACHE_RAM_BASE
-	default 0xc0000
-	format "0x%x"
-	export always
-	comment "Base address of data cache when using it for temporary RAM"
-end
-define CONFIG_DCACHE_RAM_SIZE
-	default 0x1000
-	format "0x%x"
-	export always
-	comment "Size of data cache when using it for temporary RAM"
-end
-define CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE
-	default 0
-	format "0x%x"
-	export always
-	comment "Size of region that for global variable of cache as ram stage"
-end
-define CONFIG_AP_CODE_IN_CAR
-        default 0
-        export always
-        comment "will copy coreboot_apc to AP cache ane execute in AP"
-end
-define CONFIG_MEM_TRAIN_SEQ
-        default 0
-        export always
-        comment "0: three for in bsp, 1: on every core0, 2: one for on bsp"
-end
-define CONFIG_WAIT_BEFORE_CPUS_INIT
-        default 0
-        export always
-        comment "execute cpus_ready_for_init if it is set to 1"
-end
-define CONFIG_XIP_ROM_BASE
-	default 0
-	format "0x%x"
-	export used
-	comment "Start address of area to cache during coreboot execution directly from ROM"
-end
-define CONFIG_XIP_ROM_SIZE
-	default 0
-	format "0x%x"
-	export used
-	comment "Size of area to cache during coreboot execution directly from ROM"
-end
-define CONFIG_COMPRESS
-	default 1
-	export always
-	comment "Set for compressed image"
-end
-define CONFIG_UNCOMPRESSED
-	format "%d"
-	default {!CONFIG_COMPRESS}
-	export always
-	comment "Set for uncompressed image"
-end
-define CONFIG_RAMTOP
-	format "%d"
-	default 2048*1024
-	export always
-	comment "Highest RAM that coreboot_ram will use"
-end
-define CONFIG_HAVE_OPTION_TABLE
-	default 0
-	export always
-	comment "Export CMOS option table"
-end
-define CONFIG_USE_OPTION_TABLE
-	format "%d"
-	default {CONFIG_HAVE_OPTION_TABLE && !CONFIG_USE_FALLBACK_IMAGE}
-	export always
-	comment "Use option table"
-end
-
-###############################################
-# CMOS variable options
-###############################################
-define CONFIG_LB_CKS_RANGE_START
-	default 49
-	format "%d"
-	export always
-	comment "First CMOS byte to use for coreboot options"
-end
-define CONFIG_LB_CKS_RANGE_END
-	default 125
-	format "%d"
-	export always
-	comment "Last CMOS byte to use for coreboot options"
-end
-define CONFIG_LB_CKS_LOC
-	default 126
-	format "%d"
-	export always
-	comment "Pair of bytes to use for CMOS checksum"
-end
-
-
-###############################################
-# Build targets
-###############################################
-
-define CONFIG_CRT0
-	default "$(TOP)/src/arch/$(CONFIG_ARCH)/init/crt0.S.lb"
-	export always
-	comment "Main initialization target"
-end
-
-###############################################
-# Debugging/Logging options
-###############################################
-
-define CONFIG_DEBUG
-	default 0
-	export always
-	comment "Enable x86emu debugging code"
-end
-define CONFIG_VGA_BRIDGE_SETUP
-	default 1
-	export always
-	comment "Set bridge bits to enable legacy VGA ranges"
-end
-define CONFIG_CONSOLE_VGA
-	default 0
-	export always
-	comment "Log messages to any VGA-compatible device (may require *_ROM_RUN to bring up)"
-end
-define CONFIG_CONSOLE_VGA_MULTI
-        default 0
-        export always
-        comment "Multi VGA console"
-end
-define CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST
-        default 0
-        export always
-        comment "Use onboard VGA instead of add on VGA card"
-end
-define CONFIG_CONSOLE_BTEXT
-        default 0
-        export always
-        comment "Log messages to btext fb console"
-end
-define CONFIG_CONSOLE_LOGBUF
-	default 0
-	export always
-	comment "Log messages to buffer"
-end
-define CONFIG_CONSOLE_SROM
-	default 0
-	export always
-	comment "Log messages to SROM console"
-end
-define CONFIG_CONSOLE_SERIAL8250
-	default 0
-	export always
-	comment "Log messages to 8250 uart based serial console"
-end
-define CONFIG_USBDEBUG_DIRECT
-	default 0
-	export always
-	comment "Log messages to ehci debug port console"
-end
-define CONFIG_DEFAULT_CONSOLE_LOGLEVEL
-	default 7
-	export always
-	comment "Console will log at this level unless changed"
-end
-define CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
-	default 8
-	export always
- 	comment "Error messages up to this level can be printed"
-end
-define CONFIG_SERIAL_POST
-	default 0
-	export always
-	comment "Enable SERIAL POST codes"
-end
-define CONFIG_NO_POST
-	default none
-	export used
-	comment "Disable POST codes"
-end
-define CONFIG_TTYS0_BASE
-	default 0x3f8
-	format "0x%x"
-	export always
-	comment "Base address for 8250 uart for the serial console"
-end
-define CONFIG_TTYS0_BAUD
-	default 115200
-	export always
-	comment "Default baud rate for serial console"
-end
-define CONFIG_TTYS0_DIV
-	default none
-	format "%d"
-	export used
-	comment "Allow UART divisor to be set explicitly"
-end
-define CONFIG_TTYS0_LCS
-	default 0x3
-	format "0x%x"
-	export always
-	comment "Default flow control settings for the 8250 serial console uart"
-end
-
-define CONFIG_USE_PRINTK_IN_CAR
-	default 0
-	export always
-	comment "use printk instead of print in CAR stage code"
-end
-define CONFIG_ASSEMBLER_DEBUG
-	default 0
-	export always
-	comment "Create disassembly files for debugging"
-end
-
-###############################################
-# Mainboard options
-###############################################
-
-define CONFIG_MAINBOARD
-	default "Mainboard_not_set"
-	export always
-	comment "Mainboard name"
-end
-define CONFIG_MAINBOARD_PART_NUMBER
-	default "Part_number_not_set"
-	export always
-	format "\"%s\""
-	comment "Part number of mainboard"
-end
-define CONFIG_MAINBOARD_VENDOR
-	default "Vendor_not_set"
-	export always
-	format "\"%s\""
-	comment "Vendor of mainboard"
-end
-define CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
-	default 0
-	export always
-	comment "PCI Vendor ID of mainboard manufacturer"
-end
-define CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
-	default 0
-	format "0x%x"
-	export always
-	comment "PCI susbsystem device id assigned my mainboard manufacturer"
-end
-define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
-	default none
-	export used
-	comment "Default power on after power fail setting"
-end
-define CONFIG_SYS_CLK_FREQ
-	default none
-	export used
-	comment "System clock frequency in MHz"
-end
-define CONFIG_EPIA_VT8237R_INIT
-	default none
-	export used
-	comment "Enable EPIA Specific Initialisation of VT8237R SB" 
-end
-###############################################
-# SMP options
-###############################################
-
-define CONFIG_SMP
-	default 0
-	export always
-	comment "Define if we support SMP"
-end
-define CONFIG_MAX_CPUS
-        default 1
-        export always
-        comment "Maximum CPU count for this machine"
-end
-define CONFIG_MAX_PHYSICAL_CPUS
-        default 1
-        export always
-        comment "Maximum physical CPU count for this machine"
-end
-define CONFIG_LOGICAL_CPUS
-	default 0
-	export always
-	comment "Should multiple cpus per die be enabled?"
-end
-define CONFIG_AP_IN_SIPI_WAIT
-	default 0
-	export always
-	comment "Should application processors go to SIPI wait state after initialization? (Required for Intel Core Duo)"
-end
-define CONFIG_GENERATE_MP_TABLE
-	default none
-	export used
-	comment "Define to build an MP table"
-end
-define CONFIG_SERIAL_CPU_INIT
-        default 1
-        export always
-        comment "Serialize CPU init"
-end
-define CONFIG_APIC_ID_OFFSET
-	default 0
-	export always
-	comment "We need to share this value between cache_as_ram_auto.c and northbridge.c"
-end
-define CONFIG_ENABLE_APIC_EXT_ID
-	default 0
-	export always
-	comment "Enable APIC ext id mode 8 bit"
-end
-define CONFIG_LIFT_BSP_APIC_ID
-	default 0
-	export always
-	comment "decide if we lift bsp apic id while ap apic id"
-end
-###############################################
-# Boot options
-###############################################
-
-define CONFIG_MULTIBOOT
-	default 1
-	export always
-	comment "Use Multiboot (rather than ELF boot notes) to boot the payload"
-end
-define CONFIG_ROM_PAYLOAD
-	default 0
-	export always
-	comment "Boot image is located in ROM" 
-end
-define CONFIG_COMPRESSED_PAYLOAD_NRV2B
-	default 0
-	export always
-	comment "NRV2B compressed boot image is located in ROM" 
-end
-define CONFIG_COMPRESSED_PAYLOAD_LZMA
-	default 0
-	export always
-	comment "LZMA compressed boot image is located in ROM" 
-end
-define CONFIG_PRECOMPRESSED_PAYLOAD
-	default 0
-	export always
-	comment "boot image is already compressed" 
-end
-
-define CONFIG_USE_WATCHDOG_ON_BOOT
-	default 0
-	export always
-	comment "Use the watchdog on booting"
-end
-
-###############################################
-# Plugin Device support options
-###############################################
-
-define CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT
-	default 1
-	export always
-	comment "Enable support for plugin Hypertransport busses"
-end
-define CONFIG_AGP_PLUGIN_SUPPORT
-	default 1
-	export always
-	comment "Enable support for plugin AGP busses"
-end
-define CONFIG_CARDBUS_PLUGIN_SUPPORT
-	default 1
-	export always
-	comment "Enable support cardbus plugin cards"
-end
-define CONFIG_PCIX_PLUGIN_SUPPORT
-	default 1
-	export always
-	comment "Enable support for plugin PCI-X busses"
-end
-define CONFIG_PCIEXP_PLUGIN_SUPPORT
-	default 1
-	export always
-	comment "Enable support for plugin PCI-E busses"
-end
-
-###############################################
-# IRQ options
-###############################################
-
-define CONFIG_GENERATE_PIRQ_TABLE
-	default none
-	export used
-	comment "Define if we have a PIRQ table"
-end
-define CONFIG_PIRQ_ROUTE
-	default 0
-	export always
-	comment "Define if we have a PIRQ table and want routing IRQs"
-end
-define CONFIG_IRQ_SLOT_COUNT
-	default none
-	export used
-	comment "Number of IRQ slots"
-end
-define CONFIG_PCIBIOS_IRQ
-	default none
-	export used
-	comment "PCIBIOS IRQ support"
-end
-define CONFIG_IOAPIC
-	default 0
-	export always
-	comment "IOAPIC support"
-end
-
-###############################################
-# Options for memory mapped I/O
-###############################################
-
-define CONFIG_PCI_IO_CFG_EXT
-	default 0
-	export always
-	comment "allow 4K register space via io CFG port"
-end
-
-define CONFIG_PCIC0_CFGADDR
-	default none
-	format "0x%x"
-	export used
-	comment "Address of PCI Configuration Address Register"
-end
-define CONFIG_PCIC0_CFGDATA
-	default none
-	format "0x%x"
-	export used
-	comment "Address of PCI Configuration Data Register"
-end
-define CONFIG_ISA_IO_BASE
-	default none
-	format "0x%x"
-	export used
-	comment "Base address of PCI/ISA I/O address range"
-end
-define CONFIG_ISA_MEM_BASE
-	default none
-	format "0x%x"
-	export used
-	comment "Base address of PCI/ISA memory address range"
-end
-define CONFIG_PNP_CFGADDR
-	default none
-	format "0x%x"
-	export used
-	comment "PNP Configuration Address Register offset"
-end
-define CONFIG_PNP_CFGDATA
-	default none
-	format "0x%x"
-	export used
-	comment "PNP Configuration Data Register offset"
-end
-define CONFIG_IO_BASE
-	default none
-	format "0x%x"
-	export used
-	comment "Base address of memory mapped I/O operations"
-end
-
-###############################################
-# Options for embedded systems
-###############################################
-
-define CONFIG_EMBEDDED_RAM_SIZE
-	default none
-	export used
-	comment "Embedded boards generally have fixed RAM size"
-end
-
-###############################################
-# Misc options
-###############################################
-
-define CONFIG_GDB_STUB
-	default 0
-	export used
-	comment "Compile in gdb stub support?"
-end
-
-define CONFIG_HAVE_INIT_TIMER
-	default 0
-	export always
-	comment "Have a init_timer function"
-end
-define CONFIG_HAVE_HARD_RESET
-	default none
-	export used
-	comment "Have hard reset"
-end
-define CONFIG_HAVE_SMI_HANDLER
-	default 0
-	export always
-	comment "Set, if the board needs an SMI handler"
-end
-define CONFIG_MEMORY_HOLE
-	default none
-	export used
-	comment "Set to deal with memory hole"
-end
-define CONFIG_MAX_REBOOT_CNT
-	default 3
-	export always
-	comment "Set maximum reboots"
-end
-
-###############################################
-# Misc device options
-###############################################
-
-define CONFIG_SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL
-	default 0
-	export used
-	comment "Include board specific FAN control initialization"
-end
-define CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
-	default 0
-	export used
-	comment "Use timer2 to callibrate the x86 time stamp counter"
-end
-define CONFIG_INTEL_PPRO_MTRR
-	default none
-	export used
-	comment ""
-end
-define CONFIG_UDELAY_TSC
-	default 0
-	export used
-	comment "Implement udelay with the x86 time stamp counter"
-end
-define CONFIG_UDELAY_IO
-	default 0
-	export used
-	comment "Implement udelay with x86 io registers"
-end
-define CONFIG_UDELAY_LAPIC
-	default 0
-	export used
-	comment "Implement udelay with the x86 Local APIC"
-end
-
-define CONFIG_GENERATE_ACPI_TABLES
-	default 0
-	export always
-	comment "Define to build ACPI tables"
-end
-
-define CONFIG_HAVE_ACPI_RESUME
-	default 0
-	export always
-	comment "Define to build ACPI with resume support"
-end
-
-define CONFIG_ACPI_SSDTX_NUM
-	default 0
-	export always
-	comment "extra ssdt num for PCI Device"
-end
-
-define CONFIG_AGP_APERTURE_SIZE
-	default none
-	export used
-	format "0x%x"
-	comment "AGP graphics virtual memory aperture size"
-end
-
-define CONFIG_HT_CHAIN_UNITID_BASE
-	default 1
-	export always
-	comment "this will be first hypertransport device's unitid base, if sb ht chain only has one ht device, it could be 0"
-end
-
-define CONFIG_HT_CHAIN_END_UNITID_BASE
-        default 0x20
-        export always
-        comment "this will be unit id of the end of hypertransport chain (usually the real SB) if it is small than CONFIG_HT_CHAIN_UNITID_BASE, it could be 0"
-end
-
-define CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
-        default 1
-        export always
-        comment "this will decided if only offset SB hypertransport chain"
-end
-
-define CONFIG_SB_HT_CHAIN_ON_BUS0
-        default 0 
-        export always
-        comment "this will make SB hypertransport chain sit on bus 0, if it is 1, will put sb ht chain on bus 0, if it is 2 will put other chain on 0x40, 0x80, 0xc0"
-end
-
-define CONFIG_PCI_BUS_SEGN_BITS
-        default 0
-        export always
-        comment "It could be 0, 1, 2, 3 and 4 only"
-end
-
-define CONFIG_MMCONF_SUPPORT
-	default 0
-	export always
-	comment "enable mmconfig for pci conf"
-end
-
-define CONFIG_MMCONF_SUPPORT_DEFAULT
-	default 0
-	export always
-	comment "enable mmconfig for pci conf"
-end
-
-define CONFIG_MMCONF_BASE_ADDRESS
-	default none
-	format "0x%x"
-	export used
-	comment "enable mmconfig base address"
-end
-
-define CONFIG_HW_MEM_HOLE_SIZEK
-        default 0
-        export always
-        comment "Opteron E0 later memory hole size in K, 0 mean disable"
-end
-
-define CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC
-        default 0
-        export always
-        comment "Opteron E0 later memory hole size auto increase to avoid hole startk equal to basek"
-end
-
-define CONFIG_VAR_MTRR_HOLE
-	default 1
-	export always
-	comment "using hole in MTRR instead of increasing method"
-end
-
-define CONFIG_K8_HT_FREQ_1G_SUPPORT
-	default 0 
-	export always
-	comment "Optern E0 later could support 1G HT, but still depends MB design"
-end
-
-define CONFIG_K8_REV_F_SUPPORT
-        default 0
-        export always
-        comment "Opteron Rev F (DDR2) support"
-end
-
-define CONFIG_CBB
-	default 0
-	export always
-	comment "Opteron cpu bus num base"
-end
-
-define CONFIG_CDB
-	default 0x18
-	export always
-	comment "Opteron cpu device num base"
-end
-
-define CONFIG_HT3_SUPPORT
-	default 0
-	export always
-	comment "Hypertransport 3 support, include ac HT and unganged sublink feature"
-end
-
-define CONFIG_EXT_RT_TBL_SUPPORT
-	default 0
-	export always
-	comment "support AMD family 10 extended routing table via F0x158, normally is enabled when node nums is greater than 8"
-end
-
-define CONFIG_EXT_CONF_SUPPORT
-	default 0
-	export always
-	comment "support AMD family 10 extended config space for ram, bus, io, mmio via F1x110, normally is enabled when HT3 is enabled and non ht chain nums is greater than 4"
-end
-
-define CONFIG_DIMM_SUPPORT
-        default 0x0108
-	format "0x%x"
-        export always
-        comment "DIMM support: bit 0 - sdram, bit 1: ddr1, bit 2: ddr2, bit 3: ddr3, bit 4: fbdimm, bit 8: reg"
-end
-
-define CONFIG_CPU_SOCKET_TYPE
-	default 0x10
-	export always
-	comment "cpu socket type, 0x10 mean Socket F, 0x11 mean socket M2, 0x20, Soxket G, and 0x21 mean socket M3"
-end
-
-define CONFIG_CPU_ADDR_BITS
-	default 36
-	export always
-	comment "CPU hardware address lines num, for AMD K8 could be 40, and AMD family 10 could be 48"
-end
-
-define CONFIG_VGA
-	default 0
-	export always
-	comment "Include VGA initialisation code"
-end
-
-define CONFIG_VGA_ROM_RUN
-	default 0
-	export always
-	comment "Init x86 ROMs on VGA-class PCI devices"
-end
-
-define CONFIG_PCI_ROM_RUN
-	default 0
-	export always
-	comment "Init x86 ROMs on all PCI devices"
-end
-
-define CONFIG_PCI_OPTION_ROM_RUN_YABEL
-	default 0
-	export used
-	comment "Use Yabel instead of old bios emulator"
-end
-
-define CONFIG_YABEL_DEBUG_FLAGS
-	default 0
-	export used
-	comment "YABEL debug flags, for possible values, see util/x86emu/yabel/debug.h"
-end
-
-define CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES
-	default 0
-	export used
-	comment "Allow Option ROMs executed by YABEL to access the config space of devices other than the one YABEL is running for. This may be needed by some onboard Graphics cards ROMs."
-
-end
-
-define CONFIG_PCI_OPTION_ROM_RUN_REALMODE
-	default 0
-	export used
-	comment "Use Yabel instead of old bios emulator"
-end
-
-define CONFIG_PCI_64BIT_PREF_MEM
-        default 0
-        export always
-        comment "allow PCI device get 4G above Region as pref mem"
-end
-
-define CONFIG_AMDMCT
-	default 0
-	export always
-	comment "use AMD MCT to init RAM instead of native code"
-end
-
-define CONFIG_AMD_UCODE_PATCH_FILE
-	default none
-	export used
-	format "\"%s\""
-	comment "name of the microcode patch file"	
-end
-
-define CONFIG_K8_MEM_BANK_B_ONLY
-	default 0
-	export always
-	comment "use AMD K8's memory bank B only to make a 64bit memory system and memory bank A is free, such as Filbert."
-end
-
-define CONFIG_VIDEO_MB
-        default 0
-        export always
-        comment "Integrated graphics with UMA has dynamic setup"
-end
-
-define CONFIG_GFXUMA
-        default 0
-        export always
-        comment "GFX UMA"
-end
-
-define CONFIG_HAVE_MAINBOARD_RESOURCES
-	default 0
-	export always
-	comment "Enable if the mainboard/chipset requires extra entries in the memory map"
-end
-
-define CONFIG_HAVE_LOW_TABLES
-	default 1
-	export always
-	comment "Enable if ACPI, PIRQ, MP tables are supposed to live in the low megabyte"
-end
-
-define CONFIG_WRITE_HIGH_TABLES
-	default 0
-	export always
-	comment "Enable if ACPI, PIRQ, MP tables are supposed to live at top of memory"
-end
-
-define CONFIG_SPLASH_GRAPHIC
-	default 0
-	export used
-	comment "Paint a splash screen"
-end
-
-define CONFIG_GX1_VIDEO
-	default 0
-	export used
-	comment "Build in GX1's graphic support"
-end
-
-define CONFIG_GX1_VIDEOMODE
-	default none
-	export used
-	comment "Define video mode after reset"
-# could be
-# 0 for 640x480
-# 1 for 800x600
-# 2 for 1024x768
-# 3 for 1280x960
-# 4 for 1280x1024
-end
-
-define CONFIG_PCIE_CONFIGSPACE_HOLE
-	default 0
-	export always
-	comment "Leave a hole for PCIe config space in the device allocator"
-end
-
-define CONFIG_ID_SECTION_OFFSET
-	default 0x10
-	export always
-	comment "Offset of the .id section. Only needs to change if something like a romstrap is in the way"
-end