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author | Greg Watson <jarrah@users.sourceforge.net> | 2003-07-28 21:15:13 +0000 |
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committer | Greg Watson <jarrah@users.sourceforge.net> | 2003-07-28 21:15:13 +0000 |
commit | 499b3041b43ec2f6db9dab12c5c6b6d3aa84d105 (patch) | |
tree | 195c4ed1d641b73b89826fa5d3f21281f2f1fa0e /src/config | |
parent | 821730906b34ba0b4708283b843605fcf51f9d0b (diff) | |
download | coreboot-499b3041b43ec2f6db9dab12c5c6b6d3aa84d105.tar.xz |
CPU_OPT for cpu specific flags
_RESET to specify reset vector address (ppc4xx reset vector is at end of
memory, rather than at beginning of ROM)
CONFIG_SYS_CLK_FREQ to specify frequency of system clock (needed for ppc4xx
clock speed calculation)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1049 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/config')
-rw-r--r-- | src/config/Options.lb | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/src/config/Options.lb b/src/config/Options.lb index 541592cf23..fdd87e56b7 100644 --- a/src/config/Options.lb +++ b/src/config/Options.lb @@ -106,6 +106,11 @@ define HOSTCC export always comment "Host C Compiler" end +define CPU_OPT + default none + export used + comment "Additional per-cpu CFLAGS" +end define OBJCOPY default "$(CROSS_COMPILE)objcopy" export always @@ -223,7 +228,13 @@ define _ROMBASE default {PAYLOAD_SIZE} format "0x%x" export always - comment "Base of ROM" + comment "Base address of LinuxBIOS in ROM" +end +define _RESET + default {_ROMBASE} + format "0x%x" + export always + comment "Hardware reset vector address" end define STACK_SIZE default 0x2000 @@ -241,7 +252,7 @@ define _RAMBASE default 0x4000 format "0x%x" export always - comment "Base address of RAM" + comment "Base address of LinuxBIOS in RAM" end define USE_CACHE_RAM default 0 @@ -380,7 +391,11 @@ define FINAL_MAINBOARD_FIXUP export used comment "Do final mainboard fixups" end - +define CONFIG_SYS_CLK_FREQ + default none + export used + comment "System clock frequency in MHz" +end ############################################### # SMP options |