When I started refactoring mainboard Config.lb, I added two different

files for targets without failover:
src/config/nofailovercalculation.lb (64 kB XIP)
src/config/nofailovercalculation128.lb (128 kB XIP)
Targets with other XIP sizes were ignored.

This patch moves XIP size back into mainboard code.

Benefits from this patch:
- src/config/nofailovercalculation128.lb is no longer needed
- Targets with XIP sizes besides 64k and 128k benefit from refactoring
- Conceptually, this makes the include files pure calculation files
without settings.

Abuild tested.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

3 files changed, 2 insertions, 42 deletions

diff --git a/src/config/failovercalculation.lb b/src/config/failovercalculation.lb
index 909812b7e5..d3047a84bc 100644
--- a/src/config/failovercalculation.lb
+++ b/src/config/failovercalculation.lb
@@ -36,10 +36,9 @@ default _ROMBASE      = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
 ## Compute a range of ROM that can cached to speed up coreboot,
 ## execution speed.
 ##
-## XIP_ROM_SIZE must be a power of 2.
+## XIP_ROM_SIZE must be a power of 2 and is set in mainboard Config.lb
 ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
 ##
-default XIP_ROM_SIZE = 64 * 1024
 
 if USE_FAILOVER_IMAGE
 	default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
diff --git a/src/config/nofailovercalculation.lb b/src/config/nofailovercalculation.lb
index 96bce17a75..b23de14418 100644
--- a/src/config/nofailovercalculation.lb
+++ b/src/config/nofailovercalculation.lb
@@ -31,8 +31,7 @@ default _ROMBASE      = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
 ## Compute a range of ROM that can cached to speed up coreboot,
 ## execution speed.
 ##
-## XIP_ROM_SIZE must be a power of 2.
+## XIP_ROM_SIZE must be a power of 2 and is set in mainboard Config.lb
 ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
 ##
-default XIP_ROM_SIZE = 64 * 1024
 default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE )
diff --git a/src/config/nofailovercalculation128.lb b/src/config/nofailovercalculation128.lb
deleted file mode 100644
index 9b0d7de549..0000000000
--- a/src/config/nofailovercalculation128.lb
+++ /dev/null
@@ -1,38 +0,0 @@
-##
-## Compute the location and size of where this firmware image
-## (coreboot plus bootloader) will live in the boot rom chip.
-##
-if USE_FALLBACK_IMAGE
-	default ROM_SECTION_SIZE   = FALLBACK_SIZE
-	default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
-else
-	if CONFIG_CBFS
-		default ROM_SECTION_SIZE   = FALLBACK_SIZE
-		default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FALLBACK_SIZE )
-	else
-		default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE )
-		default ROM_SECTION_OFFSET = 0
-	end
-end
-
-##
-## Compute the start location and size size of
-## The coreboot bootloader.
-##
-default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
-default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
-
-##
-## Compute where this copy of coreboot will start in the boot rom
-##
-default _ROMBASE      = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
-
-##
-## Compute a range of ROM that can cached to speed up coreboot,
-## execution speed.
-##
-## XIP_ROM_SIZE must be a power of 2.
-## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
-##
-default XIP_ROM_SIZE = 128 * 1024
-default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE )