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| author | Stefan Reinauer <stepan@coresystems.de> | 2008-10-29 04:46:52 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2008-10-29 04:46:52 +0000 |
| commit | debb11fc1fe5f5560015ab9905f1ccc2e08c73e0 (patch) | |
| tree | 9160cd3787a3213a38f5e9b9942360bcaf753f1a /src/config | |
| parent | b70d1993a432af2a026c4cad0fa3dd3c5eca1ef7 (diff) | |
| download | coreboot-debb11fc1fe5f5560015ab9905f1ccc2e08c73e0.tar.xz | |
Support for the Intel ICH7 southbridge.
This includes an early SMI handler.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/config')
| -rw-r--r-- | src/config/Options.lb | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/config/Options.lb b/src/config/Options.lb index 8e9f89d49c..6815e6c933 100644 --- a/src/config/Options.lb +++ b/src/config/Options.lb @@ -856,6 +856,11 @@ define HAVE_HARD_RESET export used comment "Have hard reset" end +define HAVE_SMI_HANDLER + default none + export used + comment "Set, if the board needs an SMI handler" +end define MEMORY_HOLE default none export used |