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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-03 12:36:09 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-09 05:23:55 +0000
commit657d68bddc030e38bc19eb4eef07f59b5e5258e4 (patch)
tree90d064a1e09721ae2e9279117ecb71f8ede854eb /src/console/Kconfig
parentdafc78bb8d6bda8bddb029168491365b333ce529 (diff)
downloadcoreboot-657d68bddc030e38bc19eb4eef07f59b5e5258e4.tar.xz
AGESA,binaryPI: Move PORT80 selection to C bootblock
Because the function is implemented in C, post_code() calls from cache_as_ram.S and other early assembly entry files may not currently work for cold boots. Assembly implementation needs to follow one day. This effectively removes PORT80 routing from boards with ROMCC_BOOTBLOCK. Change-Id: I71aa94b33bd6f65e243724810472a440e98e0750 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37451 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/console/Kconfig')
-rw-r--r--src/console/Kconfig5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/console/Kconfig b/src/console/Kconfig
index 9151a32a11..5225d11f50 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -417,6 +417,7 @@ config POST_DEVICE
choice
prompt "Device to send POST codes to"
depends on POST_DEVICE
+ default POST_DEVICE_LPC if DEFAULT_POST_ON_LPC
default POST_DEVICE_NONE
config POST_DEVICE_NONE
@@ -429,6 +430,10 @@ config POST_DEVICE_PCI_PCIE
depends on PCI
endchoice
+config DEFAULT_POST_ON_LPC
+ bool
+ default n
+
config POST_IO
bool "Send POST codes to an IO port"
depends on PC80_SYSTEM && !NO_POST