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authorDuncan Laurie <dlaurie@chromium.org>2013-06-10 10:21:41 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-11-26 19:10:20 +0100
commitd5686fe23b1341ca2c72b2941cf80577e6198f23 (patch)
tree819063f0c73d7009f946ef8f20fd3e7ff1acaa9b /src/console/post.c
parente807c34a5e34e8dd7cb959458de593ea1070fde4 (diff)
downloadcoreboot-d5686fe23b1341ca2c72b2941cf80577e6198f23.tar.xz
Extend CMOS POST code logging to store extra data
This can be used to indicate sub-state within a POST code range which can assist in debugging BIOS hangs. For example this can be used to indicate which device is about to be initialized so if the system hangs while talking to that device it can be identified. Change-Id: I2f8155155f09fe9e242ebb7204f0b5cba3a1fa1e Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/58104 Reviewed-on: http://review.coreboot.org/4229 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/console/post.c')
-rw-r--r--src/console/post.c34
1 files changed, 34 insertions, 0 deletions
diff --git a/src/console/post.c b/src/console/post.c
index 11c631d4dc..74886834ce 100644
--- a/src/console/post.c
+++ b/src/console/post.c
@@ -25,6 +25,9 @@
#include <pc80/mc146818rtc.h>
#include <smp/spinlock.h>
#endif
+#if CONFIG_CMOS_POST_EXTRA
+#include <device/device.h>
+#endif
#include <elog.h>
/* Write POST information */
@@ -51,6 +54,9 @@ DECLARE_SPIN_LOCK(cmos_post_lock)
void cmos_post_log(void)
{
u8 code = 0;
+#if CONFIG_CMOS_POST_EXTRA
+ u32 extra = 0;
+#endif
spin_lock(&cmos_post_lock);
@@ -58,9 +64,15 @@ void cmos_post_log(void)
switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
case CMOS_POST_BANK_0_MAGIC:
code = cmos_read(CMOS_POST_BANK_1_OFFSET);
+#if CONFIG_CMOS_POST_EXTRA
+ extra = cmos_read32(CMOS_POST_BANK_1_EXTRA);
+#endif
break;
case CMOS_POST_BANK_1_MAGIC:
code = cmos_read(CMOS_POST_BANK_0_OFFSET);
+#if CONFIG_CMOS_POST_EXTRA
+ extra = cmos_read32(CMOS_POST_BANK_0_EXTRA);
+#endif
break;
}
@@ -78,9 +90,31 @@ void cmos_post_log(void)
"in previous boot: 0x%02x\n", code);
#if CONFIG_ELOG
elog_add_event_word(ELOG_TYPE_LAST_POST_CODE, code);
+#if CONFIG_CMOS_POST_EXTRA
+ if (extra)
+ elog_add_event_dword(ELOG_TYPE_POST_EXTRA, extra);
+#endif
#endif
}
}
+
+#if CONFIG_CMOS_POST_EXTRA
+void post_log_extra(u32 value)
+{
+ spin_lock(&cmos_post_lock);
+
+ switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
+ case CMOS_POST_BANK_0_MAGIC:
+ cmos_write32(CMOS_POST_BANK_0_EXTRA, value);
+ break;
+ case CMOS_POST_BANK_1_MAGIC:
+ cmos_write32(CMOS_POST_BANK_1_EXTRA, value);
+ break;
+ }
+
+ spin_unlock(&cmos_post_lock);
+}
+#endif /* CONFIG_CMOS_POST_EXTRA */
#endif /* !__PRE_RAM__ */
static void cmos_post_code(u8 value)