diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2012-09-09 19:14:45 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-11-08 19:40:58 +0100 |
| commit | 1fc346179262f4d4b0ce2f97970f775407a39a1c (patch) | |
| tree | 42c319c833882f0ec6b5d3d6e61a08d31858d672 /src/console | |
| parent | b6e97b19ae6a68556838c9801c7824302d72151f (diff) | |
| download | coreboot-1fc346179262f4d4b0ce2f97970f775407a39a1c.tar.xz | |
Log unexpected post code from the previous boot
Read out the post code from the previous boot and
log it if the code is not one of the expected values.
Test:
1) interrupt the boot of the system, this is easiest
with warm reset button when servo is attached
2) check the event log with mosys
65 | 2012-09-09 12:32:11 | Last post code in previous boot | 0x9d
Change-Id: Id418f4c0cf005a3e97b8c63de67cb9a09bc57384
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/1744
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/console')
| -rw-r--r-- | src/console/post.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/src/console/post.c b/src/console/post.c index ab1afcf50a..a565c6bcfb 100644 --- a/src/console/post.c +++ b/src/console/post.c @@ -22,6 +22,7 @@ #include <arch/io.h> #include <console/console.h> #include <pc80/mc146818rtc.h> +#include <elog.h> /* Write POST information */ @@ -40,6 +41,41 @@ void __attribute__((weak)) mainboard_post(uint8_t value) #endif #if CONFIG_CMOS_POST + +#if !defined(__PRE_RAM__) +void cmos_post_log(void) +{ + u8 code; + + /* Get post code from other bank */ + switch (cmos_read(CMOS_POST_BANK_OFFSET)) { + case CMOS_POST_BANK_0_MAGIC: + code = cmos_read(CMOS_POST_BANK_1_OFFSET); + break; + case CMOS_POST_BANK_1_MAGIC: + code = cmos_read(CMOS_POST_BANK_0_OFFSET); + break; + default: + return; + } + + /* Check last post code in previous boot against normal list */ + switch (code) { + case POST_OS_BOOT: + case POST_OS_RESUME: + case POST_ENTER_ELF_BOOT: + case 0: + break; + default: + printk(BIOS_WARNING, "POST: Unexpected post code " + "in previous boot: 0x%02x\n", code); +#if CONFIG_ELOG + elog_add_event_word(ELOG_TYPE_LAST_POST_CODE, code); +#endif + } +} +#endif /* !__PRE_RAM__ */ + static void cmos_post_code(u8 value) { switch (cmos_read(CMOS_POST_BANK_OFFSET)) { |