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authorSubrata Banik <subrata.banik@intel.com>2019-05-13 12:49:16 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-05-14 06:56:59 +0000
commit55cb5f8de53366c9df10ed9307cc9088c96191cf (patch)
tree10848c3ac922968209bf97227df3f7c0ffa56d70 /src/console
parent795fda033656982a8aeef0e105bcfbc9a73c8c13 (diff)
downloadcoreboot-55cb5f8de53366c9df10ed9307cc9088c96191cf.tar.xz
Remove unnecessary ENV_RAMSTAGE guard
TEST=Able to build coreboot for CML. Change-Id: Ic0f473e04ffc1de50dee871af52eacf0b328b376 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32764 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/console')
-rw-r--r--src/console/post.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/console/post.c b/src/console/post.c
index 236aa8cdaa..b17a819d97 100644
--- a/src/console/post.c
+++ b/src/console/post.c
@@ -44,7 +44,6 @@ void __weak mainboard_post(uint8_t value)
DECLARE_SPIN_LOCK(cmos_post_lock)
-#if ENV_RAMSTAGE
void cmos_post_log(void)
{
u8 code = 0;
@@ -125,7 +124,6 @@ void post_log_clear(void)
post_log_extra(0);
}
#endif /* CONFIG_CMOS_POST_EXTRA */
-#endif /* ENV_RAMSTAGE */
static void cmos_post_code(u8 value)
{