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authorJacob Garber <jgarber1@ualberta.ca>2019-12-27 14:18:32 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-12-31 15:22:43 +0000
commit4a216475f5382d4b0ccf5fb65cd79b7ca3b32ed4 (patch)
tree967e60522f0b58aa8cbbb382c596d3f0b3bd4f7d /src/console
parentd225834220cfbe59850a97092674c4d55faff757 (diff)
downloadcoreboot-4a216475f5382d4b0ccf5fb65cd79b7ca3b32ed4.tar.xz
src: Remove some romcc workarounds
Now that romcc is gone, move cmos_post_init() into post.c, and remove some preprocessor workarounds. Change-Id: I0ee4551e476cdd1102e86e7efc74d5909f64a37b Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37950 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/console')
-rw-r--r--src/console/post.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/src/console/post.c b/src/console/post.c
index 8c28ceb672..a426fccac2 100644
--- a/src/console/post.c
+++ b/src/console/post.c
@@ -82,6 +82,30 @@ void cmos_post_log(void)
}
}
+void cmos_post_init(void)
+{
+ u8 magic = CMOS_POST_BANK_0_MAGIC;
+
+ /* Switch to the other bank */
+ switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
+ case CMOS_POST_BANK_1_MAGIC:
+ break;
+ case CMOS_POST_BANK_0_MAGIC:
+ magic = CMOS_POST_BANK_1_MAGIC;
+ break;
+ default:
+ /* Initialize to zero */
+ cmos_write(0, CMOS_POST_BANK_0_OFFSET);
+ cmos_write(0, CMOS_POST_BANK_1_OFFSET);
+#if CONFIG(CMOS_POST_EXTRA)
+ cmos_write32(CMOS_POST_BANK_0_EXTRA, 0);
+ cmos_write32(CMOS_POST_BANK_1_EXTRA, 0);
+#endif
+ }
+
+ cmos_write(magic, CMOS_POST_BANK_OFFSET);
+}
+
#if CONFIG(CMOS_POST_EXTRA)
void post_log_extra(u32 value)
{