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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-07-31 20:52:04 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-08-07 19:12:48 +0200 |
| commit | da940c58357eb45232d808a334879474c33be886 (patch) | |
| tree | 9a5f971f4b31280ec1530884a07b8be0bc72820a /src/cpu/Kconfig | |
| parent | cec611a0ea6dc3bb79e409f3f49a58ec1db81dc1 (diff) | |
| download | coreboot-da940c58357eb45232d808a334879474c33be886.tar.xz | |
Make EARLY_CONSOLE optional
This change brings back the possibility to disable console
output while in romstage, like before commit d2f45c65.
For some platforms (AMD multi-socket) USBDEBUG and/or CBMEM
CONSOLE do not work correctly for romstage due the way
cache-as-ram is set up, but might already work for ramstage.
Change-Id: Id8d830e02a18129af419d3b5860866acf315d531
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3846
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/cpu/Kconfig')
| -rw-r--r-- | src/cpu/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index 9d268e45b5..e48fe877e0 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -20,7 +20,6 @@ source src/cpu/x86/Kconfig config CACHE_AS_RAM bool - select EARLY_CONSOLE default !ROMCC config DCACHE_RAM_BASE |