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| author | Marc Jones <marc.jones@se-eng.com> | 2013-10-29 17:46:54 -0600 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2013-12-04 18:45:42 +0100 |
| commit | bdafcfa55509d0cf2cbbb686411f569d56d3916c (patch) | |
| tree | 8a46755738c18acbbfb2678cc6ff76439543bb30 /src/cpu/Makefile.inc | |
| parent | 54b8e7a0bba7787eca737506cb5d85bf408344d2 (diff) | |
| download | coreboot-bdafcfa55509d0cf2cbbb686411f569d56d3916c.tar.xz | |
Add the Intel FSP 206ax CPU core support
Add support for 206ax using the Intel FSP.
The FSP is different enough to warrant its own source files
for now. It has different CAR code, micorcode, and FSP inclusion.
It may be possible to combine this code with the mrc based
solution used by the chromebooks in the future.
Change-Id: I5105631af34e9c3a804ace908c4205f073abb9b4
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/4016
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/Makefile.inc')
| -rw-r--r-- | src/cpu/Makefile.inc | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc index a860f67752..34ae53ecef 100644 --- a/src/cpu/Makefile.inc +++ b/src/cpu/Makefile.inc @@ -28,6 +28,12 @@ cpu_ucode_cbfs_file = $(obj)/cpu_microcode_blob.bin cbfs_include_ucode = y endif +ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC), 0) +cpu_ucode_cbfs_offset = "-b $(CONFIG_CPU_MICROCODE_CBFS_LOC)" +else +cpu_ucode_cbfs_offset = "-b" +endif + # In case we have more than one "source" (cough) files containing microcode, we # link them together in one large blob, so that we get all the microcode updates # in one file. This makes it easier for objcopy in the final step. @@ -46,7 +52,7 @@ $(obj)/cpu_microcode_blob.bin: $(obj)/cpu_microcode_blob.o ifeq ($(cbfs_include_ucode),y) # Add CPU microcode to specified rom image $(1) add-cpu-microcode-to-cbfs = \ - $(CBFSTOOL) $(1) locate -f $(cpu_ucode_cbfs_file) -n $(cpu_ucode_cbfs_name) -a 16 | xargs $(CBFSTOOL) $(1) add -n $(cpu_ucode_cbfs_name) -f $(cpu_ucode_cbfs_file) -t 0x53 -b + $(CBFSTOOL) $(1) locate -f $(cpu_ucode_cbfs_file) -n $(cpu_ucode_cbfs_name) -a 16 | xargs $(CBFSTOOL) $(1) add -n $(cpu_ucode_cbfs_name) -f $(cpu_ucode_cbfs_file) -t 0x53 $(cpu_ucode_cbfs_offset) else add-cpu-microcode-to-cbfs = true endif |