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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2013-12-24 16:48:03 -0500
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-01-08 23:03:34 +0100
commitbc30b2b225a31f7fcf4e25014a73739641a8df71 (patch)
treea0dc179a5392d3432822bbc12642a601f7a8f5f8 /src/cpu/allwinner/a10/clock.c
parent8226dbbf1d85be662ab6d427ca80c305cf0b719d (diff)
downloadcoreboot-bc30b2b225a31f7fcf4e25014a73739641a8df71.tar.xz
cpu/allwinner/a10: Refactor API for gating clocks to peripherals
Rather than having to track which bit in which register should be cleared or set to gate or ungate the clock to a certain peripheral, provide a simplified enum which encodes the register and bit. This change comes with a function which decodes the enum and gates/ungates the clock. This also removes the register-dependent bitmasks for APB0 and APB1 gating registers. Change-Id: Ib3ca16e54eb37eadc3ceb88f4ccc497829ac34bc Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4571 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/allwinner/a10/clock.c')
-rw-r--r--src/cpu/allwinner/a10/clock.c42
1 files changed, 42 insertions, 0 deletions
diff --git a/src/cpu/allwinner/a10/clock.c b/src/cpu/allwinner/a10/clock.c
new file mode 100644
index 0000000000..87a3574783
--- /dev/null
+++ b/src/cpu/allwinner/a10/clock.c
@@ -0,0 +1,42 @@
+/*
+ * Helpers for clock control and gating on Allwinner CPUs
+ *
+ * Copyright (C) 2013 Alexandru Gagniuc <mr.nuke.me@gmail.com>
+ * Subject to the GNU GPL v2, or (at your option) any later version.
+ */
+
+#include "clock.h"
+
+#include <arch/io.h>
+
+/**
+ * \brief Enable the clock source for the peripheral
+ *
+ * @param[in] periph peripheral and clock type to enable @see a1x_clken
+ */
+void a1x_periph_clock_enable(enum a1x_clken periph)
+{
+ void *addr;
+ u32 reg32;
+
+ addr = (void *)A1X_CCM_BASE + (periph >> 5);
+ reg32 = read32(addr);
+ reg32 |= 1 << (periph & 0x1f);
+ write32(reg32, addr);
+}
+
+/**
+ * \brief Disable the clock source for the peripheral
+ *
+ * @param[in] periph peripheral and clock type to disable @see a1x_clken
+ */
+void a1x_periph_clock_disable(enum a1x_clken periph)
+{
+ void *addr;
+ u32 reg32;
+
+ addr = (void *)A1X_CCM_BASE + (periph >> 5);
+ reg32 = read32(addr);
+ reg32 &= ~(1 << (periph & 0x1f));
+ write32(reg32, addr);
+}