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author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2013-12-13 20:44:48 -0600 |
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committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2014-01-08 22:54:08 +0100 |
commit | f64111b4865d611821950b25dc1ea235d8d9ca79 (patch) | |
tree | d61eef4c9476ada907f0d91e93c2707aed44df96 /src/cpu/allwinner/a10/uart_console.c | |
parent | 34286b861a9427520f3f3afb8bf64bfa7de37c24 (diff) | |
download | coreboot-f64111b4865d611821950b25dc1ea235d8d9ca79.tar.xz |
cpu: Add initial support for Allwinner A10 SoC
Add minimal support needed to get a bootblock capable of initialising
a serial console.
Change-Id: I50dd85544549baf9c5ea0aa3b4296972136c02a4
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4549
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/allwinner/a10/uart_console.c')
-rw-r--r-- | src/cpu/allwinner/a10/uart_console.c | 109 |
1 files changed, 109 insertions, 0 deletions
diff --git a/src/cpu/allwinner/a10/uart_console.c b/src/cpu/allwinner/a10/uart_console.c new file mode 100644 index 0000000000..58930ddd66 --- /dev/null +++ b/src/cpu/allwinner/a10/uart_console.c @@ -0,0 +1,109 @@ +/* + * Glue to UART code to enable serial console + * + * Copyright 2013 Google Inc. + * Copyright (C) 2013 Alexandru Gagniuc <mr.nuke.me@gmail.com> + * Subject to the GNU GPL v2, or (at your option) any later version. + */ + +#include <config.h> +#include <types.h> +#include <uart.h> +#include <arch/io.h> + +#include <console/console.h> +#include <cpu/allwinner/a10/uart.h> + +static void *get_console_uart_base_addr(void) +{ + /* This big block gets compiled to a constant, not a function call */ + if (CONFIG_CONSOLE_SERIAL_UART0) + return (void *)A1X_UART0_BASE; + else if (CONFIG_CONSOLE_SERIAL_UART1) + return (void *)A1X_UART1_BASE; + else if (CONFIG_CONSOLE_SERIAL_UART2) + return (void *)A1X_UART2_BASE; + else if (CONFIG_CONSOLE_SERIAL_UART3) + return (void *)A1X_UART3_BASE; + else if (CONFIG_CONSOLE_SERIAL_UART4) + return (void *)A1X_UART4_BASE; + else if (CONFIG_CONSOLE_SERIAL_UART5) + return (void *)A1X_UART5_BASE; + else if (CONFIG_CONSOLE_SERIAL_UART6) + return (void *)A1X_UART6_BASE; + else if (CONFIG_CONSOLE_SERIAL_UART7) + return (void *)A1X_UART7_BASE; + + /* If selection is invalid, default to UART0 */ + return (void *)A1X_UART0_BASE; +} + +static u32 get_console_uart_baud(void) +{ + if (CONFIG_CONSOLE_SERIAL_115200) + return 115200; + else if (CONFIG_CONSOLE_SERIAL_57600) + return 57600; + else if (CONFIG_CONSOLE_SERIAL_38400) + return 34800; + else if (CONFIG_CONSOLE_SERIAL_19200) + return 19200; + else if (CONFIG_CONSOLE_SERIAL_9600) + return 9600; + + /* Default to 115200 if selection is invalid */ + return 115200; +} + +static void a10_uart_init_dev(void) +{ + void *uart_base = get_console_uart_base_addr(); + /* Use default 8N1 encoding */ + a10_uart_configure(uart_base, get_console_uart_baud(), + 8, UART_PARITY_NONE, 1); + a10_uart_enable_fifos(uart_base); +} + +static unsigned char a10_uart_rx_byte(void) +{ + return a10_uart_rx_blocking(get_console_uart_base_addr()); +} + +static void a10_uart_tx_byte(unsigned char data) +{ + a10_uart_tx_blocking(get_console_uart_base_addr(), data); +} + +uint32_t uartmem_getbaseaddr(void) +{ + return (uint32_t) get_console_uart_base_addr(); +} + +#if !defined(__PRE_RAM__) +static const struct console_driver a10_uart_console __console = { + .init = a10_uart_init_dev, + .tx_byte = a10_uart_tx_byte, + .rx_byte = a10_uart_rx_byte, +}; +#else + +void uart_init(void) +{ + a10_uart_init_dev(); +} + +unsigned char uart_rx_byte(void) +{ + return a10_uart_rx_byte(); +} + +void uart_tx_byte(unsigned char data) +{ + a10_uart_tx_byte(data); +} + +void uart_tx_flush(void) +{ +} + +#endif |