diff options
| author | Gabe Black <gabeblack@google.com> | 2013-09-30 21:25:49 -0700 |
|---|---|---|
| committer | Isaac Christensen <isaac.christensen@se-eng.com> | 2014-08-25 19:07:04 +0200 |
| commit | 77ffa0d3ad7686a9e697bf1fa05966f019249483 (patch) | |
| tree | 6ec24401a68eb9ae7c347b079c80413c206a093f /src/cpu/allwinner | |
| parent | 3905e3d47c773e2c9664f09b7209711764683da6 (diff) | |
| download | coreboot-77ffa0d3ad7686a9e697bf1fa05966f019249483.tar.xz | |
UART 8250: Unconditionally provide register constants and use UART8250 prefix.
The register indexes and bitfield masks were guarded by the UART8250 config
options, but it might be (is) necessary to use them in a driver that is
UART8250 like without actually using the 8250 driver itself. To avoid any name
collision with other drivers, also change the constant prefix from UART_ to
UART8250_.
Change-Id: Ie606d9e0329132961c3004688176204a829569dc
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/171336
Reviewed-by: Ronald Minnich <rminnich@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit a93900be8d8a8260db49e30737608f9161fbf249)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6715
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/cpu/allwinner')
| -rw-r--r-- | src/cpu/allwinner/a10/uart.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/cpu/allwinner/a10/uart.c b/src/cpu/allwinner/a10/uart.c index feccc8232f..407bd863aa 100644 --- a/src/cpu/allwinner/a10/uart.c +++ b/src/cpu/allwinner/a10/uart.c @@ -22,19 +22,19 @@ static void a10_uart_configure(struct a10_uart *uart, u32 baud_rate, u8 data_bit div = (u16) uart_baudrate_divisor(baud_rate, uart_platform_refclk(), 16); /* Enable access to Divisor Latch register */ - write32(UART_LCR_DLAB, &uart->lcr); + write32(UART8250_LCR_DLAB, &uart->lcr); /* Set baudrate */ write32((div >> 8) & 0xff, &uart->dlh); write32(div & 0xff, &uart->dll); /* Set line control */ - reg32 = (data_bits - 5) & UART_LCR_WLS_MSK; + reg32 = (data_bits - 5) & UART8250_LCR_WLS_MSK; switch (parity) { case UART_PARITY_ODD: - reg32 |= UART_LCR_PEN; + reg32 |= UART8250_LCR_PEN; break; case UART_PARITY_EVEN: - reg32 |= UART_LCR_PEN; - reg32 |= UART_LCR_EPS; + reg32 |= UART8250_LCR_PEN; + reg32 |= UART8250_LCR_EPS; break; case UART_PARITY_NONE: /* Fall through */ default: @@ -45,7 +45,7 @@ static void a10_uart_configure(struct a10_uart *uart, u32 baud_rate, u8 data_bit static void a10_uart_enable_fifos(struct a10_uart *uart) { - write32(UART_FCR_FIFO_EN, &uart->fcr); + write32(UART8250_FCR_FIFO_EN, &uart->fcr); } static int tx_fifo_full(struct a10_uart *uart) @@ -54,12 +54,12 @@ static int tx_fifo_full(struct a10_uart *uart) * that the TX register is empty, not that the FIFO is not full, but * this may be due to a datasheet typo. Keep the current name to signal * intent. */ - return !(read32(&uart->lsr) & UART_LSR_THRE); + return !(read32(&uart->lsr) & UART8250_LSR_THRE); } static int rx_fifo_empty(struct a10_uart *uart) { - return !(read32(&uart->lsr) & UART_LSR_DR); + return !(read32(&uart->lsr) & UART8250_LSR_DR); } /** |