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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-04-15 15:41:38 -0500
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-04-16 23:42:19 +0200
commit065b7da298953feaec3563bf753f45cf00fba2c0 (patch)
tree0e10d32eff24f13ca8112a8bf50b4ddc938f766c /src/cpu/amd/agesa/family15tn/chip_name.c
parent53072d869ad9234781b5a479dfcc9a9288723da6 (diff)
downloadcoreboot-065b7da298953feaec3563bf753f45cf00fba2c0.tar.xz
cpu/amd/agesa/family15tn: Add udelay implementation for SMM
This is a small implementation which uses only MSRs and rdtsc, without relying on northbridge or other system hardware. It's SMM safe in that it only reads registers, and doesn't modify the state of the hardware. Change-Id: Ifa02ca73455b382f830c9b30b80b4f1bb18706b4 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/5501 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/amd/agesa/family15tn/chip_name.c')
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