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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-22 15:24:15 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-28 17:26:47 +0200 |
commit | f8e96f07d40152a3b11a70ddbd909e9da8fabf7e (patch) | |
tree | a0866a497ab35935cd9b4c3a0b1004b7b99669fd /src/cpu/amd/agesa | |
parent | b426107d1db17b606a90be83ddd3bf8a1c0d8751 (diff) | |
download | coreboot-f8e96f07d40152a3b11a70ddbd909e9da8fabf7e.tar.xz |
AGESA boards: Drop get_bus_conf.c files
The only remaining purpose for get_bus_conf() was to fill in obscure
bus_sb800 (etc.) arrays containing partial PCI bus enumeration. Complete
enumeration is available in devicetree and PCI configuration space so
discard these arrays.
Change-Id: I733115940afba3a50c58aedb9a04ecf5082b1234
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6360
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/cpu/amd/agesa')
-rw-r--r-- | src/cpu/amd/agesa/amd_late_init.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/cpu/amd/agesa/amd_late_init.c b/src/cpu/amd/agesa/amd_late_init.c index c8b941d634..faba328eea 100644 --- a/src/cpu/amd/agesa/amd_late_init.c +++ b/src/cpu/amd/agesa/amd_late_init.c @@ -31,8 +31,6 @@ #include <sb_cimx.h> #endif -void get_bus_conf(void); - static void agesawrapper_post_device(void *unused) { if (acpi_is_wakeup_s3()) @@ -40,9 +38,6 @@ static void agesawrapper_post_device(void *unused) AGESAWRAPPER(amdinitlate); - /* Preparation for write_tables(). */ - get_bus_conf(); - #if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY_16KB) device_t dev; u32 value; |