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author | Patrick Georgi <patrick@georgi-clan.de> | 2012-03-31 12:52:21 +0200 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-25 16:27:07 +0200 |
commit | 05e740fc40e409dcf8d592f4bbeaf87dc92140c5 (patch) | |
tree | 5b05e1ea6cd2a9c82ac218984e8ee5526c9b77c5 /src/cpu/amd/agesa | |
parent | 8919729307028746cf7bc527ca511183fe3b401b (diff) | |
download | coreboot-05e740fc40e409dcf8d592f4bbeaf87dc92140c5.tar.xz |
Replace cache control magic numbers with symbols
Instead of opaque numbers like (1<<29), use
symbols like CR0_NoWriteThrough.
Change-Id: Id845e087fb472cfaf5f71beaf37fbf0d407880b5
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/833
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/amd/agesa')
-rwxr-xr-x | src/cpu/amd/agesa/cache_as_ram.inc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/cpu/amd/agesa/cache_as_ram.inc b/src/cpu/amd/agesa/cache_as_ram.inc index 2124bf3be8..389f7ec5f8 100755 --- a/src/cpu/amd/agesa/cache_as_ram.inc +++ b/src/cpu/amd/agesa/cache_as_ram.inc @@ -28,6 +28,7 @@ */ #include "gcccar.inc" +#include <cpu/x86/cache.h> /* * XMM map: @@ -88,7 +89,7 @@ disable_cache_as_ram: /* Disable cache */ movl %cr0, %eax - orl $(1 << 30), %eax + orl $CR0_CacheDisable, %eax movl %eax, %cr0 invd |