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authorZheng Bao <fishbaozi@gmail.com>2013-02-17 16:25:36 +0800
committerDave Frodin <dave.frodin@se-eng.com>2013-02-18 01:08:44 +0100
commit96508a794969f35f10e8a346c227dfa7a026e9ea (patch)
tree15e54b1bc3f0446cc5c127065e14f5e4ca350880 /src/cpu/amd/agesa
parent7b6945405a7c703bb371cab973238e0c15b07cdf (diff)
downloadcoreboot-96508a794969f35f10e8a346c227dfa7a026e9ea.tar.xz
AMD S3: Include the s3_resume.h only when S3 is enabled.
Change-Id: I9a6c4f61e5dda6665f92c8526bb26a458ee2b739 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/2384 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Diffstat (limited to 'src/cpu/amd/agesa')
-rw-r--r--src/cpu/amd/agesa/family14/model_14_init.c2
-rw-r--r--src/cpu/amd/agesa/family15tn/model_15_init.c2
2 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c
index 9cc36e2b24..7fac016636 100644
--- a/src/cpu/amd/agesa/family14/model_14_init.c
+++ b/src/cpu/amd/agesa/family14/model_14_init.c
@@ -33,7 +33,9 @@
#include <cpu/x86/mtrr.h>
#include <cpu/amd/amdfam14.h>
#include <arch/acpi.h>
+#if CONFIG_HAVE_ACPI_RESUME
#include <cpu/amd/agesa/s3_resume.h>
+#endif
#define MCI_STATUS 0x401
diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c
index 39533bb3d6..68cb0d2e84 100644
--- a/src/cpu/amd/agesa/family15tn/model_15_init.c
+++ b/src/cpu/amd/agesa/family15tn/model_15_init.c
@@ -33,7 +33,9 @@
#include <cpu/x86/mtrr.h>
#include <cpu/amd/amdfam15.h>
#include <arch/acpi.h>
+#if CONFIG_HAVE_ACPI_RESUME
#include <cpu/amd/agesa/s3_resume.h>
+#endif
msr_t rdmsr_amd(u32 index)
{