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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-06-02 20:25:03 -0500
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-07-07 01:41:59 +0200
commitfb39f82116f0411ee85e3d91bfd97237c34debbb (patch)
tree5a3f3ce0fff3b021f081aa8e5a29acc5f9c21b91 /src/cpu/amd/car
parenta97e0075a22af82ede8ab70a7e26d2a9e88490ea (diff)
downloadcoreboot-fb39f82116f0411ee85e3d91bfd97237c34debbb.tar.xz
cpu/amd/car: Move AP stacks below the BSP stack to free up space
Caching SPD data during startup requires additional CAR space. There was a large chunk of free space between the AP stack top and the BSP stack bottom; moving the AP stacks below the BSP stack allows this space to be utilized. TEST: Booted ASUS KGPE-D16 with dual Opteron 6129 processors (16 cores) and 120k of CAR. Change-Id: I370ff368affde7061d6547527bda058b9016e977 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/10404 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Diffstat (limited to 'src/cpu/amd/car')
-rw-r--r--src/cpu/amd/car/cache_as_ram.inc15
1 files changed, 12 insertions, 3 deletions
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc
index 51ebba60f7..ac6ea33b98 100644
--- a/src/cpu/amd/car/cache_as_ram.inc
+++ b/src/cpu/amd/car/cache_as_ram.inc
@@ -26,6 +26,7 @@
#define CacheSize CONFIG_DCACHE_RAM_SIZE
#define CacheBase (0xd0000 - CacheSize)
#define CacheSizeBSPStack CONFIG_DCACHE_BSP_STACK_SIZE
+#define CacheSizeBSPSlush CONFIG_DCACHE_BSP_STACK_SLUSH
/* For CAR with Fam10h. */
#define CacheSizeAPStack CONFIG_DCACHE_AP_STACK_SIZE
@@ -377,9 +378,17 @@ CAR_FAM10_ap:
/*
* Need to set stack pointer for AP.
* It will be from:
- * CacheBase + CacheSize / 2
+ * CacheBase + (CacheSize - (CacheSizeBSPStack + CacheSizeBSPSlush))
* - (NodeID << CoreIDbits + CoreID) * CacheSizeAPStack
- * So need to get the NodeID and CoreID at first.
+ * The spacing between the BSP stack and the top of the AP
+ * stacks is purposefully set larger (an extra CacheSizeBSPSlush
+ * worth of unused space) than necessary to aid debugging when
+ * additional stack variables are added by future developers.
+ * The extra space will allow BSP overruns to be caught by
+ * the warning logic and easily fixed instead of crashing the
+ * system with no obvious clues of what went wrong.
+ *
+ * So, need to get the NodeID and CoreID at first.
* If NB_CFG bit 54 is set just use initial APIC ID, otherwise need
* to reverse it.
*/
@@ -411,7 +420,7 @@ roll_cfg:
/* Calculate stack pointer. */
movl $CacheSizeAPStack, %eax
mull %ebx
- movl $(CacheBase + CacheSize / 2), %esp
+ movl $(CacheBase + (CacheSize - (CacheSizeBSPStack + CacheSizeBSPSlush))), %esp
subl %eax, %esp
/* Retrive init detected. */