summaryrefslogtreecommitdiff
path: root/src/cpu/amd/car
diff options
context:
space:
mode:
authorMarco Schmidt <mashpb@gmail.com>2009-06-06 11:21:52 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-06-06 11:21:52 +0000
commitc263b4471dd42895b409652b3f3567fcb5cdaae1 (patch)
tree43b41c055734dc0208aee33e301895db71e46901 /src/cpu/amd/car
parent240ef7c7691a29e96f7710b2f6d6d95b5bb53d13 (diff)
downloadcoreboot-c263b4471dd42895b409652b3f3567fcb5cdaae1.tar.xz
Fix for Erratum 343 for AMD Fam10h CPUs.
Signed-off-by: Marco Schmidt <mashpb@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4345 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/car')
-rw-r--r--src/cpu/amd/car/cache_as_ram.inc18
-rw-r--r--src/cpu/amd/car/post_cache_as_ram.c14
2 files changed, 32 insertions, 0 deletions
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc
index 162680db73..94990a66f7 100644
--- a/src/cpu/amd/car/cache_as_ram.inc
+++ b/src/cpu/amd/car/cache_as_ram.inc
@@ -27,6 +27,8 @@
/* for CAR_FAM10 */
#define CacheSizeAPStack 0x400 /* 1K */
+#define MSR_FAM10 0xC001102A
+
#define jmp_if_k8(x) comisd %xmm2, %xmm1; jb x
#define CPUID_MASK 0x0ff00f00
@@ -122,6 +124,22 @@ CAR_FAM10_out:
bts $15, %eax
wrmsr
+ /* Erratum 343, RevGuide for Fam10h, Pub#41322 Rev. 3.33 */
+
+ /* read-address has to be stored in the ecx register */
+ movl $MSR_FAM10, %ecx
+
+ /* execute special read command for msr-register. Result is then in the EDX:EAX-registers (MSBs in EDX) */
+ rdmsr
+
+ /* Set bit 35 to 1 in EAX */
+ bts $35, %eax
+
+ /* write back the modified register EDX:EAX to the MSR specified in ECX */
+ wrmsr
+
+ /* Erratum 343 end */
+
CAR_FAM10_out_post_errata:
/* Set MtrrFixDramModEn for clear fixed mtrr */
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index ce8ef19647..89366e0e33 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -23,7 +23,19 @@ static void inline __attribute__((always_inline)) memcopy(void *dest, const voi
: "S" (src), "D" (dest), "c" ((bytes)>>2)
);
}
+/* Disable Erratum 343 Workaround, see RevGuide for Fam10h, Pub#41322 Rev 3.33 */
+static void vErrata343(void)
+{
+ msr_t msr;
+ unsigned int uiMask = 0xFFFFFFF7;
+
+#ifdef BU_CFG2_MSR
+ msr = rdmsr(BU_CFG2_MSR);
+ msr.hi &= uiMask; // set bit 35 to 0
+ wrmsr(BU_CFG2_MSR, msr);
+#endif
+}
static void post_cache_as_ram(void)
{
@@ -56,6 +68,8 @@ static void post_cache_as_ram(void)
print_debug("Copying data from cache to RAM -- switching to use RAM as stack... ");
/* from here don't store more data in CAR */
+ vErrata343();
+
#if 0
__asm__ volatile (
"pushl %eax\n\t"