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| author | Patrick Georgi <patrick@georgi-clan.de> | 2012-11-20 18:20:56 +0100 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-11-28 07:45:05 +0100 |
| commit | bbc880eee702fc175d4a3c3e87b682c26c38f940 (patch) | |
| tree | a5a55d36dc52758723f0426e3189e0084bedb348 /src/cpu/amd/car | |
| parent | 721265b87ac1e70dea72c5b1ae7f5878214557cf (diff) | |
| download | coreboot-bbc880eee702fc175d4a3c3e87b682c26c38f940.tar.xz | |
amdk8/amdfam10: Use CAR_GLOBAL for sysinfo
This gets rid of the somewhat unstructured placement of AMD's
sysinfo structure in CAR.
We used to carve out some CAR space using a Kconfig variable,
and then put sysinfo there manually (by "virtue" of pointer magic).
Now it's a variable with the CAR_GLOBAL qualifier, and build
system magic.
For this, the following steps were done (but must happen together
since the intermediates won't build):
- Add new CAR_GLOBAL sysinfo_car
- point all sysinfo pointers to sysinfo_car instead of GLOBAL_VAR
- remove DCACHE_RAM_GLOBAL_VAR_SIZE
- from CAR setup (no need to reserve the space)
- commented out code (that was commented out for years)
- only copy sizeof(sysinfo) into RAM after ram init, where
before it copied the whole GLOBAL_VAR area.
- from Kconfig
Change-Id: I3cbcccd883ca6751326c8e32afde2eb0c91229ed
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1887
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/cpu/amd/car')
| -rw-r--r-- | src/cpu/amd/car/cache_as_ram.inc | 9 | ||||
| -rw-r--r-- | src/cpu/amd/car/post_cache_as_ram.c | 6 |
2 files changed, 3 insertions, 12 deletions
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc index 18a19fc030..686025fda3 100644 --- a/src/cpu/amd/car/cache_as_ram.inc +++ b/src/cpu/amd/car/cache_as_ram.inc @@ -25,9 +25,6 @@ #define CacheSize CONFIG_DCACHE_RAM_SIZE #define CacheBase (0xd0000 - CacheSize) -/* Leave some space for global variable to pass to RAM stage. */ -#define GlobalVarSize CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE - /* For CAR with Fam10h. */ #define CacheSizeAPStack 0x400 /* 1K */ @@ -348,7 +345,7 @@ fam10_end_part1: rep stosl /* Set up the stack pointer. */ - movl $(CacheBase + CacheSize - GlobalVarSize), %eax + movl $(CacheBase + CacheSize), %eax movl %eax, %esp post_code(0xa3) @@ -358,7 +355,7 @@ CAR_FAM10_ap: /* * Need to set stack pointer for AP. * It will be from: - * CacheBase + (CacheSize - GlobalVarSize) / 2 + * CacheBase + CacheSize / 2 * - (NodeID << CoreIDbits + CoreID) * CacheSizeAPStack * So need to get the NodeID and CoreID at first. * If NB_CFG bit 54 is set just use initial APIC ID, otherwise need @@ -392,7 +389,7 @@ roll_cfg: /* Calculate stack pointer. */ movl $CacheSizeAPStack, %eax mull %ebx - movl $(CacheBase + (CacheSize - GlobalVarSize) / 2), %esp + movl $(CacheBase + CacheSize / 2), %esp subl %eax, %esp /* Retrive init detected. */ diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c index 2aa4f302d3..861948ff57 100644 --- a/src/cpu/amd/car/post_cache_as_ram.c +++ b/src/cpu/amd/car/post_cache_as_ram.c @@ -164,12 +164,6 @@ static void post_cache_as_ram(void) set_sysinfo_in_ram(1); // So other core0 could start to train mem -#if CONFIG_MEM_TRAIN_SEQ == 1 -// struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); - - // wait for ap memory to trained -// wait_all_core0_mem_trained(sysinfox); // moved to lapic_init_cpus.c -#endif /*copy and execute coreboot_ram */ copy_and_run(0); /* We will not return */ |