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| author | Martin Roth <martinroth@google.com> | 2017-06-24 13:24:26 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-28 17:48:34 +0000 |
| commit | 5f46af6325b5facb9a608b0f86595b92b98ed718 (patch) | |
| tree | b43c7b4ea908ef874aaae437e51e07c57852d92c /src/cpu/amd/family_10h-family_15h/fidvid.c | |
| parent | 2a6f4aecfe0b76aa3feb14c3267be226b328697b (diff) | |
| download | coreboot-5f46af6325b5facb9a608b0f86595b92b98ed718.tar.xz | |
cpu/amd: add IS_ENABLED() around Kconfig symbol references
Some of these can be changed from #if to if(), but that will happen
in a follow-on commmit.
Change-Id: I9f4155285529ec28e826637a61436478f648704c
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20335
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/cpu/amd/family_10h-family_15h/fidvid.c')
| -rw-r--r-- | src/cpu/amd/family_10h-family_15h/fidvid.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/src/cpu/amd/family_10h-family_15h/fidvid.c b/src/cpu/amd/family_10h-family_15h/fidvid.c index 126271875b..12fc2c7f21 100644 --- a/src/cpu/amd/family_10h-family_15h/fidvid.c +++ b/src/cpu/amd/family_10h-family_15h/fidvid.c @@ -94,21 +94,21 @@ b.- prep_fid_change(...) static inline void print_debug_fv(const char *str, u32 val) { -#if CONFIG_SET_FIDVID_DEBUG +#if IS_ENABLED(CONFIG_SET_FIDVID_DEBUG) printk(BIOS_DEBUG, "%s%x\n", str, val); #endif } static inline void print_debug_fv_8(const char *str, u8 val) { -#if CONFIG_SET_FIDVID_DEBUG +#if IS_ENABLED(CONFIG_SET_FIDVID_DEBUG) printk(BIOS_DEBUG, "%s%02x\n", str, val); #endif } static inline void print_debug_fv_64(const char *str, u32 val, u32 val2) { -#if CONFIG_SET_FIDVID_DEBUG +#if IS_ENABLED(CONFIG_SET_FIDVID_DEBUG) printk(BIOS_DEBUG, "%s%x%x\n", str, val, val2); #endif } @@ -503,7 +503,7 @@ static void config_power_ctrl_misc_reg(pci_devfn_t dev, uint64_t cpuRev, } /* TODO: look into C1E state and F3xA0[IdleExitEn]*/ - #if CONFIG_SVI_HIGH_FREQ + #if IS_ENABLED(CONFIG_SVI_HIGH_FREQ) if (cpuRev & AMD_FAM10_C3) { dword |= SVI_HIGH_FREQ_ON; } @@ -583,7 +583,7 @@ static void config_acpi_pwr_state_ctrl_regs(pci_devfn_t dev, uint64_t cpuRev, if (cpuRev & AMD_DR_Bx ) { smaf001 = 0xA6; } else { - #if CONFIG_SVI_HIGH_FREQ + #if IS_ENABLED(CONFIG_SVI_HIGH_FREQ) if (cpuRev & (AMD_RB_C3 | AMD_DA_C3)) { smaf001 = 0xF6; } @@ -1034,7 +1034,7 @@ void init_fidvid_stage2(u32 apicid, u32 nodeid) } -#if CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST +#if IS_ENABLED(CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST) struct ap_apicid_st { u32 num; // it could use 256 bytes for 64 node quad core system @@ -1053,7 +1053,7 @@ static void store_ap_apicid(unsigned ap_apicid, void *gp) int init_fidvid_bsp(u32 bsp_apicid, u32 nodes) { -#if CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST +#if IS_ENABLED(CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST) struct ap_apicid_st ap_apicidx; u32 i; #endif @@ -1068,7 +1068,8 @@ int init_fidvid_bsp(u32 bsp_apicid, u32 nodes) print_debug_fv("BSP fid = ", fv.common_fid); -#if CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST && !CONFIG_SET_FIDVID_CORE0_ONLY +#if IS_ENABLED(CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST) && \ + !IS_ENABLED(CONFIG_SET_FIDVID_CORE0_ONLY) /* For all APs (We know the APIC ID of all APs even when the APIC ID is lifted) remote read from AP LAPIC_MSG_REG about max fid. Then calculate the common max fid that can be used for all |