diff options
author | Julius Werner <jwerner@chromium.org> | 2018-10-15 17:19:58 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-18 12:50:41 +0000 |
commit | e64a585374de88ea896ed517445a34986aa321b9 (patch) | |
tree | c9a5015ba7a856d6e3d80dbf351223796307da6f /src/cpu/amd/family_10h-family_15h/model_10xxx_init.c | |
parent | 6205221a7375f5b54ddee77b303915c593c35599 (diff) | |
download | coreboot-e64a585374de88ea896ed517445a34986aa321b9.tar.xz |
console: Set default loglevel to 8 (SPEW) for CONFIG_CHROMEOS
CB:26053 changed coreboot's default loglevel from SPEW to DEBUG. This
may be the most reasonable choice for most users that are mostly
interested in the UART console. However, on Chrome OS devices the UART
is disabled for production configurations anyway, and instead they rely
heavily on the CBMEM console for remote debugging and bug reports. For
these kinds of cases more info is almost always better, and you can't
easily reproduce a remotely filed bug if you notice that you need some
info that is only provided by BIOS_SPEW. On the other hand, the cost of
logging extra info to the CBMEM console is pretty negligible.
Therefore, let's bump the loglevel for CONFIG_CHROMEOS in particular
back up to the maximum. (Unfortunately, it seems that you can't 'select'
a choice option from another option, so this has to go in the
console/Kconfig file.)
Change-Id: I50724e3f7f8f57fdbc5846f21babc71798b21b65
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/29144
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/amd/family_10h-family_15h/model_10xxx_init.c')
0 files changed, 0 insertions, 0 deletions