diff options
author | Martin Roth <martinroth@google.com> | 2017-06-24 13:24:26 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-06-28 17:48:34 +0000 |
commit | 5f46af6325b5facb9a608b0f86595b92b98ed718 (patch) | |
tree | b43c7b4ea908ef874aaae437e51e07c57852d92c /src/cpu/amd/family_10h-family_15h | |
parent | 2a6f4aecfe0b76aa3feb14c3267be226b328697b (diff) | |
download | coreboot-5f46af6325b5facb9a608b0f86595b92b98ed718.tar.xz |
cpu/amd: add IS_ENABLED() around Kconfig symbol references
Some of these can be changed from #if to if(), but that will happen
in a follow-on commmit.
Change-Id: I9f4155285529ec28e826637a61436478f648704c
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20335
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/cpu/amd/family_10h-family_15h')
-rw-r--r-- | src/cpu/amd/family_10h-family_15h/fidvid.c | 17 | ||||
-rw-r--r-- | src/cpu/amd/family_10h-family_15h/init_cpus.c | 28 | ||||
-rw-r--r-- | src/cpu/amd/family_10h-family_15h/model_10xxx_init.c | 4 |
3 files changed, 25 insertions, 24 deletions
diff --git a/src/cpu/amd/family_10h-family_15h/fidvid.c b/src/cpu/amd/family_10h-family_15h/fidvid.c index 126271875b..12fc2c7f21 100644 --- a/src/cpu/amd/family_10h-family_15h/fidvid.c +++ b/src/cpu/amd/family_10h-family_15h/fidvid.c @@ -94,21 +94,21 @@ b.- prep_fid_change(...) static inline void print_debug_fv(const char *str, u32 val) { -#if CONFIG_SET_FIDVID_DEBUG +#if IS_ENABLED(CONFIG_SET_FIDVID_DEBUG) printk(BIOS_DEBUG, "%s%x\n", str, val); #endif } static inline void print_debug_fv_8(const char *str, u8 val) { -#if CONFIG_SET_FIDVID_DEBUG +#if IS_ENABLED(CONFIG_SET_FIDVID_DEBUG) printk(BIOS_DEBUG, "%s%02x\n", str, val); #endif } static inline void print_debug_fv_64(const char *str, u32 val, u32 val2) { -#if CONFIG_SET_FIDVID_DEBUG +#if IS_ENABLED(CONFIG_SET_FIDVID_DEBUG) printk(BIOS_DEBUG, "%s%x%x\n", str, val, val2); #endif } @@ -503,7 +503,7 @@ static void config_power_ctrl_misc_reg(pci_devfn_t dev, uint64_t cpuRev, } /* TODO: look into C1E state and F3xA0[IdleExitEn]*/ - #if CONFIG_SVI_HIGH_FREQ + #if IS_ENABLED(CONFIG_SVI_HIGH_FREQ) if (cpuRev & AMD_FAM10_C3) { dword |= SVI_HIGH_FREQ_ON; } @@ -583,7 +583,7 @@ static void config_acpi_pwr_state_ctrl_regs(pci_devfn_t dev, uint64_t cpuRev, if (cpuRev & AMD_DR_Bx ) { smaf001 = 0xA6; } else { - #if CONFIG_SVI_HIGH_FREQ + #if IS_ENABLED(CONFIG_SVI_HIGH_FREQ) if (cpuRev & (AMD_RB_C3 | AMD_DA_C3)) { smaf001 = 0xF6; } @@ -1034,7 +1034,7 @@ void init_fidvid_stage2(u32 apicid, u32 nodeid) } -#if CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST +#if IS_ENABLED(CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST) struct ap_apicid_st { u32 num; // it could use 256 bytes for 64 node quad core system @@ -1053,7 +1053,7 @@ static void store_ap_apicid(unsigned ap_apicid, void *gp) int init_fidvid_bsp(u32 bsp_apicid, u32 nodes) { -#if CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST +#if IS_ENABLED(CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST) struct ap_apicid_st ap_apicidx; u32 i; #endif @@ -1068,7 +1068,8 @@ int init_fidvid_bsp(u32 bsp_apicid, u32 nodes) print_debug_fv("BSP fid = ", fv.common_fid); -#if CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST && !CONFIG_SET_FIDVID_CORE0_ONLY +#if IS_ENABLED(CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST) && \ + !IS_ENABLED(CONFIG_SET_FIDVID_CORE0_ONLY) /* For all APs (We know the APIC ID of all APs even when the APIC ID is lifted) remote read from AP LAPIC_MSG_REG about max fid. Then calculate the common max fid that can be used for all diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c index 2f90f430f2..c151aac5d1 100644 --- a/src/cpu/amd/family_10h-family_15h/init_cpus.c +++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c @@ -16,7 +16,7 @@ #include "init_cpus.h" -#if CONFIG_HAVE_OPTION_TABLE +#if IS_ENABLED(CONFIG_HAVE_OPTION_TABLE) #include "option_table.h" #endif #include <pc80/mc146818rtc.h> @@ -36,7 +36,7 @@ #include "cpu/amd/car/post_cache_as_ram.c" -#if CONFIG_PCI_IO_CFG_EXT +#if IS_ENABLED(CONFIG_PCI_IO_CFG_EXT) static void set_EnableCf8ExtCfg(void) { // set the NB_CFG[46]=1; @@ -152,7 +152,7 @@ static void for_each_ap(uint32_t bsp_apicid, uint32_t core_range, int8_t node, /* get_nodes define in ht_wrapper.c */ nodes = get_nodes(); - if (!CONFIG_LOGICAL_CPUS || + if (!IS_ENABLED(CONFIG_LOGICAL_CPUS) || read_option(multi_core, 0) != 0) { // 0 means multi core disable_siblings = 1; } else { @@ -182,8 +182,8 @@ static void for_each_ap(uint32_t bsp_apicid, uint32_t core_range, int8_t node, for (j = jstart; j <= jend; j++) { ap_apicid = get_boot_apic_id(i, j); -#if CONFIG_ENABLE_APIC_EXT_ID && (CONFIG_APIC_ID_OFFSET > 0) -#if !CONFIG_LIFT_BSP_APIC_ID +#if IS_ENABLED(CONFIG_ENABLE_APIC_EXT_ID) && (CONFIG_APIC_ID_OFFSET > 0) +#if !IS_ENABLED(CONFIG_LIFT_BSP_APIC_ID) if ((i != 0) || (j != 0)) /* except bsp */ #endif ap_apicid += CONFIG_APIC_ID_OFFSET; @@ -227,7 +227,7 @@ static inline int lapic_remote_read(int apicid, int reg, u32 *pvalue) return result; } -#if CONFIG_SET_FIDVID +#if IS_ENABLED(CONFIG_SET_FIDVID) static void init_fidvid_ap(u32 apicid, u32 nodeid, u32 coreid); #endif @@ -398,17 +398,17 @@ u32 init_cpus(u32 cpu_init_detectedx, struct sys_info *sysinfo) if (!is_fam15h()) set_apicid_cpuid_lo(); set_EnableCf8ExtCfg(); -#if CONFIG_ENABLE_APIC_EXT_ID +#if IS_ENABLED(CONFIG_ENABLE_APIC_EXT_ID) enable_apic_ext_id(id.nodeid); #endif } enable_lapic(); -#if CONFIG_ENABLE_APIC_EXT_ID && (CONFIG_APIC_ID_OFFSET > 0) +#if IS_ENABLED(CONFIG_ENABLE_APIC_EXT_ID) && (CONFIG_APIC_ID_OFFSET > 0) u32 initial_apicid = get_initial_apicid(); -#if !CONFIG_LIFT_BSP_APIC_ID +#if !IS_ENABLED(CONFIG_LIFT_BSP_APIC_ID) if (initial_apicid != 0) // other than bsp #endif { @@ -420,7 +420,7 @@ u32 init_cpus(u32 cpu_init_detectedx, struct sys_info *sysinfo) lapic_write(LAPIC_ID, dword); } -#if CONFIG_LIFT_BSP_APIC_ID +#if IS_ENABLED(CONFIG_LIFT_BSP_APIC_ID) bsp_apicid += CONFIG_APIC_ID_OFFSET; #endif @@ -473,8 +473,8 @@ u32 init_cpus(u32 cpu_init_detectedx, struct sys_info *sysinfo) } } -#if CONFIG_SET_FIDVID -#if CONFIG_LOGICAL_CPUS && CONFIG_SET_FIDVID_CORE0_ONLY +#if IS_ENABLED(CONFIG_SET_FIDVID) +#if IS_ENABLED(CONFIG_LOGICAL_CPUS) && IS_ENABLED(CONFIG_SET_FIDVID_CORE0_ONLY) // Run on all AP for proper FID/VID setup. if (id.coreid == 0) // only need set fid for core0 #endif @@ -574,7 +574,7 @@ static void start_node(u8 node) /* Enable routing table */ printk(BIOS_DEBUG, "Start node %02x", node); -#if CONFIG_NORTHBRIDGE_AMD_AMDFAM10 +#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AMDFAM10) /* For FAM10 support, we need to set Dram base/limit for the new node */ pci_write_config32(NODE_MP(node), 0x44, 0); pci_write_config32(NODE_MP(node), 0x40, 3); @@ -1865,7 +1865,7 @@ void finalize_node_setup(struct sys_info *sysinfo) cpuSetAMDPCI(i); } -#if CONFIG_SET_FIDVID +#if IS_ENABLED(CONFIG_SET_FIDVID) // Prep each node for FID/VID setup. prep_fid_change(); #endif diff --git a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c index b002b62548..361a866638 100644 --- a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c +++ b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c @@ -64,7 +64,7 @@ static void model_10xxx_init(device_t dev) u8 i; msr_t msr; struct node_core_id id; -#if CONFIG_LOGICAL_CPUS +#if IS_ENABLED(CONFIG_LOGICAL_CPUS) u32 siblings; #endif uint8_t delay_start; @@ -124,7 +124,7 @@ static void model_10xxx_init(device_t dev) /* Set the processor name string */ init_processor_name(); -#if CONFIG_LOGICAL_CPUS +#if IS_ENABLED(CONFIG_LOGICAL_CPUS) siblings = cpuid_ecx(0x80000008) & 0xff; if (siblings > 0) { |