diff options
author | Marc Jones <marc.jones@amd.com> | 2007-12-19 01:32:08 +0000 |
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committer | Marc Jones <marc.jones@amd.com> | 2007-12-19 01:32:08 +0000 |
commit | 8ae8c8822068ef1722c08073ffa4ecc25633cbee (patch) | |
tree | 8c7bbf2f7b791081e486439a9b7ffb2fd6e649ac /src/cpu/amd/microcode/microcode.c | |
parent | 2006b38fed2f5f3680de1736f7fc878823f2f93b (diff) | |
download | coreboot-8ae8c8822068ef1722c08073ffa4ecc25633cbee.tar.xz |
Initial AMD Barcelona support for rev Bx.
These are the core files for HyperTransport, DDR2 Memory, and multi-core initialization.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Reviewed-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Myles Watson <myles@pel.cs.byu.edu>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3014 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/microcode/microcode.c')
-rw-r--r-- | src/cpu/amd/microcode/microcode.c | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/src/cpu/amd/microcode/microcode.c b/src/cpu/amd/microcode/microcode.c index 3f0105cf92..0bbded08d4 100644 --- a/src/cpu/amd/microcode/microcode.c +++ b/src/cpu/amd/microcode/microcode.c @@ -17,6 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#ifndef __ROMCC__ + #include <stdint.h> #include <console/console.h> #include <cpu/cpu.h> @@ -24,6 +26,8 @@ #include <cpu/amd/microcode.h> #include <cpu/x86/cache.h> +#endif + struct microcode { u32 date_code; u32 patch_id; @@ -56,8 +60,11 @@ struct microcode { static int need_apply_patch(struct microcode *m, u32 equivalent_processor_rev_id) { - if (m->processor_rev_id != equivalent_processor_rev_id) return 0; - + if (m->processor_rev_id != equivalent_processor_rev_id) { + printk_debug("microcode: rev id does not match this patch.\n"); + printk_debug("microcode: Not updated! Fix microcode_updates[] \n"); + return 0; + } if (m->nb_dev_id) { //look at the device id, if not found return; //if(m->nb_rev_id != installed_nb_rev_id) return 0; @@ -86,7 +93,7 @@ void amd_update_microcode(void *microcode_updates, u32 equivalent_processor_rev_ msr = rdmsr(0x8b); patch_id = msr.lo; - printk_debug("microcode: equivalent processor rev id = 0x%04x, patch id = 0x%08x\n", equivalent_processor_rev_id, patch_id); + printk_debug("microcode: equivalent rev id = 0x%04x, current patch id = 0x%08x\n", equivalent_processor_rev_id, patch_id); m = microcode_updates; @@ -100,13 +107,13 @@ void amd_update_microcode(void *microcode_updates, u32 equivalent_processor_rev_ wrmsr(0xc0010020, msr); - printk_debug("microcode: patch id that want to apply= 0x%08x\n", m->patch_id); + printk_debug("microcode: patch id to apply = 0x%08x\n", m->patch_id); //read the patch_id again msr = rdmsr(0x8b); new_patch_id = msr.lo; - printk_debug("microcode: updated to patch id = 0x%08x %s\r\n", new_patch_id , (new_patch_id == m->patch_id)?" success":" fail" ); + printk_debug("microcode: updated to patch id = 0x%08x %s\n", new_patch_id , (new_patch_id == m->patch_id)?" success\n":" fail\n" ); break; } c += 2048; |