summaryrefslogtreecommitdiff
path: root/src/cpu/amd/model_10xxx/update_microcode.c
diff options
context:
space:
mode:
authorMarc Jones <marc.jones@amd.com>2008-04-22 23:20:07 +0000
committerMarc Jones <marc.jones@amd.com>2008-04-22 23:20:07 +0000
commit8127dc41d1fde1118cdbe3bf6b592312b5b85c02 (patch)
tree08827883b0bff5c400452aba8fc3b2a93df4cdb2 /src/cpu/amd/model_10xxx/update_microcode.c
parentc74e3627233558c62e93beb37efa271f0f353f8d (diff)
downloadcoreboot-8127dc41d1fde1118cdbe3bf6b592312b5b85c02.tar.xz
Update the FAM10 microcode to current versions.
In addition, AP microcode is now updated in early initialization to support errata settings that require it. Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/model_10xxx/update_microcode.c')
-rw-r--r--src/cpu/amd/model_10xxx/update_microcode.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/src/cpu/amd/model_10xxx/update_microcode.c b/src/cpu/amd/model_10xxx/update_microcode.c
index 8233247962..32d7750dcc 100644
--- a/src/cpu/amd/model_10xxx/update_microcode.c
+++ b/src/cpu/amd/model_10xxx/update_microcode.c
@@ -31,14 +31,14 @@ static const u8 microcode_updates[] __attribute__ ((aligned(16))) = {
#ifdef __ROMCC__
- // Barcelona revAx
+ // Barcelona rev Ax
// #include "mc_patch_01000020.h"
- // Barcelona revBx
- #include "mc_patch_01000033.h"
+ // Barcelona rev B0, B1, BA
+// #include "mc_patch_01000066.h"
- // Barcelona rev Cx??
-// #include "mc_patch_01000035.h"
+ // Barcelona rev B2, B3
+ #include "mc_patch_01000065.h"
#endif
/* Dummy terminator */
@@ -57,6 +57,7 @@ static u32 get_equivalent_processor_rev_id(u32 orig_id) {
0x100f21, 0x1020,
0x100f2A, 0x1020,
0x100f22, 0x1022,
+ 0x100f23, 0x1022,
};
u32 new_id;