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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-12-08 07:21:05 +0200 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-02-03 04:51:52 +0100 |
| commit | 5fe1fb7a5fc0c3e9ffbc30187e2a5c15f86f2a08 (patch) | |
| tree | 0d2ad4d07d217c6dbec352408091f5d8af6cab4b /src/cpu/amd/model_10xxx | |
| parent | 893b81f79f43bb25e9ba7f83339475fed729899a (diff) | |
| download | coreboot-5fe1fb7a5fc0c3e9ffbc30187e2a5c15f86f2a08.tar.xz | |
cpu/amd (non-AGESA): Load microcode updates from CBFS
Change-Id: Ic67856414ea2fea9a9eb95d72136cb05da9483fa
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4502
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Diffstat (limited to 'src/cpu/amd/model_10xxx')
| -rw-r--r-- | src/cpu/amd/model_10xxx/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/amd/model_10xxx/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/cpu/amd/model_10xxx/microcode_blob.c | 9 | ||||
| -rw-r--r-- | src/cpu/amd/model_10xxx/update_microcode.c | 27 |
4 files changed, 14 insertions, 25 deletions
diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig index 09c7ec7bd8..1b79eb08d9 100644 --- a/src/cpu/amd/model_10xxx/Kconfig +++ b/src/cpu/amd/model_10xxx/Kconfig @@ -9,6 +9,7 @@ config CPU_AMD_MODEL_10XXX select MMCONF_SUPPORT_DEFAULT select TSC_SYNC_LFENCE select UDELAY_LAPIC + select SUPPORT_CPU_UCODE_IN_CBFS if CPU_AMD_MODEL_10XXX diff --git a/src/cpu/amd/model_10xxx/Makefile.inc b/src/cpu/amd/model_10xxx/Makefile.inc index 2f04762058..f5cf37514c 100644 --- a/src/cpu/amd/model_10xxx/Makefile.inc +++ b/src/cpu/amd/model_10xxx/Makefile.inc @@ -4,3 +4,5 @@ ramstage-y += processor_name.c romstage-y += update_microcode.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c + +cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c diff --git a/src/cpu/amd/model_10xxx/microcode_blob.c b/src/cpu/amd/model_10xxx/microcode_blob.c new file mode 100644 index 0000000000..78eae36732 --- /dev/null +++ b/src/cpu/amd/model_10xxx/microcode_blob.c @@ -0,0 +1,9 @@ +unsigned char microcode[] __attribute__ ((aligned(16))) = { +#include CONFIG_AMD_UCODE_PATCH_FILE + + /* Dummy terminator */ + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, +}; diff --git a/src/cpu/amd/model_10xxx/update_microcode.c b/src/cpu/amd/model_10xxx/update_microcode.c index 3cdf97898a..8dcd90dd1a 100644 --- a/src/cpu/amd/model_10xxx/update_microcode.c +++ b/src/cpu/amd/model_10xxx/update_microcode.c @@ -19,13 +19,8 @@ */ #include <stdint.h> -#include <console/console.h> #include <cpu/amd/microcode.h> -static const u8 microcode_updates[] __attribute__ ((aligned(16))) = { - -#ifdef __PRE_RAM__ - /* From the Revision Guide : * Equivalent Processor Table for AMD Family 10h Processors * @@ -47,16 +42,6 @@ static const u8 microcode_updates[] __attribute__ ((aligned(16))) = { * 00100FA0h (PH-E0) 10A0h 010000bfh */ -#include CONFIG_AMD_UCODE_PATCH_FILE - -#endif - /* Dummy terminator */ - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, -}; - struct id_mapping { uint32_t orig_id; uint16_t new_id; @@ -101,14 +86,6 @@ static u16 get_equivalent_processor_rev_id(u32 orig_id) { void update_microcode(u32 cpu_deviceid) { - u32 equivalent_processor_rev_id; - - /* Update the microcode */ - equivalent_processor_rev_id = get_equivalent_processor_rev_id(cpu_deviceid ); - if (equivalent_processor_rev_id != 0) { - amd_update_microcode((void *) microcode_updates, equivalent_processor_rev_id); - } else { - printk(BIOS_DEBUG, "microcode: rev id not found. Skipping microcode patch!\n"); - } - + u32 equivalent_processor_rev_id = get_equivalent_processor_rev_id(cpu_deviceid); + amd_update_microcode_from_cbfs(equivalent_processor_rev_id); } |