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authorMarc Jones <marc.jones@amd.com>2008-04-25 21:34:25 +0000
committerMarc Jones <marc.jones@amd.com>2008-04-25 21:34:25 +0000
commit65e08040f912698752b239f499f3efc7f1c0ac0c (patch)
tree0d582a6677dae7471309ac1151a3ebf01d09ffc2 /src/cpu/amd/model_10xxx
parent7ca3ec2e5c8d03e2b73d9aaaf6758047cd32b433 (diff)
downloadcoreboot-65e08040f912698752b239f499f3efc7f1c0ac0c.tar.xz
Remove inline from FAM10 CPU initialization functions.
This doesn't save any space for me but it is the right thing to allow GCC to optimize. Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/model_10xxx')
-rw-r--r--src/cpu/amd/model_10xxx/fidvid.c6
-rw-r--r--src/cpu/amd/model_10xxx/init_cpus.c16
2 files changed, 11 insertions, 11 deletions
diff --git a/src/cpu/amd/model_10xxx/fidvid.c b/src/cpu/amd/model_10xxx/fidvid.c
index dac53f8806..23a5642867 100644
--- a/src/cpu/amd/model_10xxx/fidvid.c
+++ b/src/cpu/amd/model_10xxx/fidvid.c
@@ -25,21 +25,21 @@
// if we are tight of CAR stack, disable it
#define FAM10_SET_FIDVID_STORE_AP_APICID_AT_FIRST 1
-static inline void print_debug_fv(const char *str, u32 val)
+static void print_debug_fv(const char *str, u32 val)
{
#if FAM10_SET_FIDVID_DEBUG == 1
printk_debug("%s%x\n", str, val);
#endif
}
-static inline void print_debug_fv_8(const char *str, u8 val)
+static void print_debug_fv_8(const char *str, u8 val)
{
#if FAM10_SET_FIDVID_DEBUG == 1
printk_debug("%s%02x\n", str, val);
#endif
}
-static inline void print_debug_fv_64(const char *str, u32 val, u32 val2)
+static void print_debug_fv_64(const char *str, u32 val, u32 val2)
{
#if FAM10_SET_FIDVID_DEBUG == 1
printk_debug("%s%x%x\n", str, val, val2);
diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c
index 2de1ad6bdb..c67ef6ce81 100644
--- a/src/cpu/amd/model_10xxx/init_cpus.c
+++ b/src/cpu/amd/model_10xxx/init_cpus.c
@@ -30,24 +30,24 @@
#define FAM10_SET_FIDVID_CORE0_ONLY 0
#endif
-static inline void print_initcpu8 (const char *strval, u8 val)
+static void print_initcpu8 (const char *strval, u8 val)
{
printk_debug("%s%02x\n", strval, val);
}
-static inline void print_initcpu8_nocr (const char *strval, u8 val)
+static void print_initcpu8_nocr (const char *strval, u8 val)
{
printk_debug("%s%02x", strval, val);
}
-static inline void print_initcpu16 (const char *strval, u16 val)
+static void print_initcpu16 (const char *strval, u16 val)
{
printk_debug("%s%04x\n", strval, val);
}
-static inline void print_initcpu(const char *strval, u32 val)
+static void print_initcpu(const char *strval, u32 val)
{
printk_debug("%s%08x\n", strval, val);
}
@@ -59,7 +59,7 @@ static void init_fidvid_stage2(u32 apicid, u32 nodeid);
void cpuSetAMDMSR(void);
#if PCI_IO_CFG_EXT == 1
-static inline void set_EnableCf8ExtCfg(void)
+static void set_EnableCf8ExtCfg(void)
{
// set the NB_CFG[46]=1;
msr_t msr;
@@ -69,7 +69,7 @@ static inline void set_EnableCf8ExtCfg(void)
wrmsr(NB_CFG_MSR, msr);
}
#else
-static inline void set_EnableCf8ExtCfg(void) { }
+static void set_EnableCf8ExtCfg(void) { }
#endif
@@ -78,7 +78,7 @@ static inline void set_EnableCf8ExtCfg(void) { }
/* because we will use gs to store hi, so need to make sure lo can start
from 0, So PCI_MMIO_BASE & 0x00ffffff should be equal to 0*/
-static inline void set_pci_mmio_conf_reg(void)
+static void set_pci_mmio_conf_reg(void)
{
#if MMCONF_SUPPORT
msr_t msr;
@@ -184,7 +184,7 @@ static void for_each_ap(u32 bsp_apicid, u32 core_range,
}
/* FIXME: Duplicate of what is in lapic.h? */
-static inline int lapic_remote_read(int apicid, int reg, u32 *pvalue)
+static int lapic_remote_read(int apicid, int reg, u32 *pvalue)
{
int timeout;
u32 status;