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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-12-08 07:21:05 +0200 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-02-03 04:51:52 +0100 |
| commit | 5fe1fb7a5fc0c3e9ffbc30187e2a5c15f86f2a08 (patch) | |
| tree | 0d2ad4d07d217c6dbec352408091f5d8af6cab4b /src/cpu/amd/model_fxx | |
| parent | 893b81f79f43bb25e9ba7f83339475fed729899a (diff) | |
| download | coreboot-5fe1fb7a5fc0c3e9ffbc30187e2a5c15f86f2a08.tar.xz | |
cpu/amd (non-AGESA): Load microcode updates from CBFS
Change-Id: Ic67856414ea2fea9a9eb95d72136cb05da9483fa
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4502
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Diffstat (limited to 'src/cpu/amd/model_fxx')
| -rw-r--r-- | src/cpu/amd/model_fxx/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/amd/model_fxx/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/cpu/amd/model_fxx/microcode_blob.c | 13 | ||||
| -rw-r--r-- | src/cpu/amd/model_fxx/model_fxx_init.c | 2 | ||||
| -rw-r--r-- | src/cpu/amd/model_fxx/model_fxx_update_microcode.c | 27 |
5 files changed, 21 insertions, 24 deletions
diff --git a/src/cpu/amd/model_fxx/Kconfig b/src/cpu/amd/model_fxx/Kconfig index bdcf5bb4f9..9ee2bf74cf 100644 --- a/src/cpu/amd/model_fxx/Kconfig +++ b/src/cpu/amd/model_fxx/Kconfig @@ -9,6 +9,7 @@ config CPU_AMD_MODEL_FXX select SSE2 select TSC_SYNC_LFENCE select UDELAY_LAPIC + select SUPPORT_CPU_UCODE_IN_CBFS if CPU_AMD_MODEL_FXX config UDELAY_IO diff --git a/src/cpu/amd/model_fxx/Makefile.inc b/src/cpu/amd/model_fxx/Makefile.inc index cf4ac2183f..19a6255c6b 100644 --- a/src/cpu/amd/model_fxx/Makefile.inc +++ b/src/cpu/amd/model_fxx/Makefile.inc @@ -5,3 +5,5 @@ ramstage-y += model_fxx_init.c ramstage-y += model_fxx_update_microcode.c ramstage-y += processor_name.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c + +cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c diff --git a/src/cpu/amd/model_fxx/microcode_blob.c b/src/cpu/amd/model_fxx/microcode_blob.c new file mode 100644 index 0000000000..1b6b979cd4 --- /dev/null +++ b/src/cpu/amd/model_fxx/microcode_blob.c @@ -0,0 +1,13 @@ +unsigned char microcode[] __attribute__ ((aligned(16))) = { +#if !CONFIG_K8_REV_F_SUPPORT + #include "microcode_rev_c.h" + #include "microcode_rev_d.h" + #include "microcode_rev_e.h" +#endif + + /* Dummy terminator */ + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, +}; diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c index 260e83ecb0..33226d465a 100644 --- a/src/cpu/amd/model_fxx/model_fxx_init.c +++ b/src/cpu/amd/model_fxx/model_fxx_init.c @@ -468,7 +468,7 @@ static void model_fxx_init(device_t dev) x86_mtrr_check(); /* Update the microcode */ - model_fxx_update_microcode(dev->device); + update_microcode(dev->device); disable_cache(); diff --git a/src/cpu/amd/model_fxx/model_fxx_update_microcode.c b/src/cpu/amd/model_fxx/model_fxx_update_microcode.c index af10ce0670..ed673496f8 100644 --- a/src/cpu/amd/model_fxx/model_fxx_update_microcode.c +++ b/src/cpu/amd/model_fxx/model_fxx_update_microcode.c @@ -23,24 +23,6 @@ #include <console/console.h> #include <cpu/amd/microcode.h> -static uint8_t microcode_updates[] __attribute__ ((aligned(16))) = { - -#if !CONFIG_K8_REV_F_SUPPORT - #include "microcode_rev_c.h" - #include "microcode_rev_d.h" - #include "microcode_rev_e.h" -#endif - -#if CONFIG_K8_REV_F_SUPPORT -// #include "microcode_rev_f.h" -#endif - /* Dummy terminator */ - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, -}; - struct id_mapping { uint32_t orig_id; uint16_t new_id; @@ -95,12 +77,11 @@ static u16 get_equivalent_processor_rev_id(u32 orig_id) { return new_id; } -void model_fxx_update_microcode(unsigned cpu_deviceid) +void update_microcode(uint32_t cpu_deviceid) { - unsigned equivalent_processor_rev_id; + uint32_t equivalent_rev_id; /* Update the microcode */ - equivalent_processor_rev_id = get_equivalent_processor_rev_id(cpu_deviceid ); - if(equivalent_processor_rev_id != 0) - amd_update_microcode(microcode_updates, equivalent_processor_rev_id); + equivalent_rev_id = get_equivalent_processor_rev_id(cpu_deviceid); + amd_update_microcode_from_cbfs(equivalent_rev_id); } |