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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-23 21:07:28 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-28 18:47:23 +0200 |
| commit | cbe7464c623d148c96974f0ce8724ead0ad5478d (patch) | |
| tree | e47ead759132c68dbbd5a498184c3ef2c46f8b75 /src/cpu/amd/model_fxx | |
| parent | 3f4aece4e07b15a5a2d191873da04b88c8e87049 (diff) | |
| download | coreboot-cbe7464c623d148c96974f0ce8724ead0ad5478d.tar.xz | |
src/cpu: Add required space before opening parenthesis '('
Change-Id: I7fb9bfcaeec0b9dfd0695d2b2d398fd01091f6bc
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16286
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Omar Pakker
Diffstat (limited to 'src/cpu/amd/model_fxx')
| -rw-r--r-- | src/cpu/amd/model_fxx/powernow_acpi.c | 6 | ||||
| -rw-r--r-- | src/cpu/amd/model_fxx/processor_name.c | 8 |
2 files changed, 7 insertions, 7 deletions
diff --git a/src/cpu/amd/model_fxx/powernow_acpi.c b/src/cpu/amd/model_fxx/powernow_acpi.c index d64c6d96ee..52138a191a 100644 --- a/src/cpu/amd/model_fxx/powernow_acpi.c +++ b/src/cpu/amd/model_fxx/powernow_acpi.c @@ -775,7 +775,7 @@ static void pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP) /* See if the CPUID(0x80000007) returned EDX[2:1]==11b */ cpuid1 = cpuid(0x80000007); - if((cpuid1.edx & 0x6)!=0x6) { + if ((cpuid1.edx & 0x6)!=0x6) { printk(BIOS_INFO, "Processor not capable of performing P-state transitions\n"); return; } @@ -845,7 +845,7 @@ static void pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP) Pstate_vid[0] = Max_vid; Pstate_power[0] = data->pwr * 100; - for(Pstate_num = 1; + for (Pstate_num = 1; (Pstate_num <= MAXP) && (data->pstates[Pstate_num - 1].freqMhz != 0); Pstate_num++) { Pstate_fid[Pstate_num] = freq_to_fid(data->pstates[Pstate_num - 1].freqMhz) & 0x3f; @@ -862,7 +862,7 @@ static void pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP) /* Loop over all CPU's */ for (dev = 0x18; dev < 0x1c; dev++) { - if(dev_find_slot(0, PCI_DEVFN(dev, 0)) == NULL) + if (dev_find_slot(0, PCI_DEVFN(dev, 0)) == NULL) continue; for (i = 0; i < (cmp_cap + 1); i++) { diff --git a/src/cpu/amd/model_fxx/processor_name.c b/src/cpu/amd/model_fxx/processor_name.c index 2e2ad39699..60dbf6ecb1 100644 --- a/src/cpu/amd/model_fxx/processor_name.c +++ b/src/cpu/amd/model_fxx/processor_name.c @@ -118,10 +118,10 @@ int init_processor_name(void) EightBitBrandId = cpuid_ebx(0x00000001) & 0xff; BrandId = cpuid_ebx(0x80000001) & 0xffff; - if(!EightBitBrandId && !BrandId) { + if (!EightBitBrandId && !BrandId) { BrandTableIndex = 0; NN = 0xffffff; - } else if(!EightBitBrandId) { + } else if (!EightBitBrandId) { BrandTableIndex = (BrandId >> 6) & 0x3f; // BrandId[11:6] NN = BrandId & 0x3f; // // BrandId[6:0] } else { @@ -392,7 +392,7 @@ int init_processor_name(void) */ for (i=0; i<47; i++) { // 48 -1 - if(program_string[i] == program_string[i+1]) { + if (program_string[i] == program_string[i+1]) { switch (program_string[i]) { #if !CONFIG_K8_REV_F_SUPPORT case 'X': ModelNumber = 22+ NN; break; @@ -412,7 +412,7 @@ int init_processor_name(void) #endif } - if(ModelNumber && ModelNumber < 100) { + if (ModelNumber && ModelNumber < 100) { // No idea what to do with RR=100. According // to the revision guide this is possible. // |