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| author | Xavi Drudis Ferran <xdrudis@tinet.cat> | 2011-02-28 03:59:34 +0000 |
|---|---|---|
| committer | Marc Jones <marc.jones@amd.com> | 2011-02-28 03:59:34 +0000 |
| commit | b6711723208e35451f1f65910a50e8c2a3f6eb3b (patch) | |
| tree | 63dc1857e342dacb3460f82a71d0bc1729b0c6b0 /src/cpu/amd/model_fxx | |
| parent | 6bdc83bf5e76aa0b36cb5f52c11544091d71770b (diff) | |
| download | coreboot-b6711723208e35451f1f65910a50e8c2a3f6eb3b.tar.xz | |
Improving BKDG implementation of P-states,
CPU and northbridge frequency and voltage
handling for Fam 10 in SVI mode.
I don't understand what this was doing nor find docs for these regs
Maybe it was left over from some copy & paste ?
Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6411 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/model_fxx')
0 files changed, 0 insertions, 0 deletions