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authorRonald G. Minnich <rminnich@gmail.com>2006-04-10 16:40:19 +0000
committerRonald G. Minnich <rminnich@gmail.com>2006-04-10 16:40:19 +0000
commit45f6c5e3d450053e53a8ff4a687fd0dcaf2d7475 (patch)
tree8cf49ad51549655c749bc7bc8edd98de41bd604e /src/cpu/amd/model_gx2
parent526b2c429e41bbd177853169deb63c1bf00c70a9 (diff)
downloadcoreboot-45f6c5e3d450053e53a8ff4a687fd0dcaf2d7475.tar.xz
add cpureginit to romcc code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/model_gx2')
-rw-r--r--src/cpu/amd/model_gx2/cpureginit.c26
-rw-r--r--src/cpu/amd/model_gx2/model_gx2_init.c2
2 files changed, 5 insertions, 23 deletions
diff --git a/src/cpu/amd/model_gx2/cpureginit.c b/src/cpu/amd/model_gx2/cpureginit.c
index 9cd928ecbe..e50079955e 100644
--- a/src/cpu/amd/model_gx2/cpureginit.c
+++ b/src/cpu/amd/model_gx2/cpureginit.c
@@ -1,15 +1,4 @@
-#include <console/console.h>
-#include <arch/io.h>
-#include <stdint.h>
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <stdlib.h>
-#include <string.h>
-#include <bitops.h>
-#include <cpu/amd/gx2def.h>
-#include <cpu/x86/msr.h>
-#include <cpu/x86/cache.h>
+
/* ***************************************************************************/
/* **/
@@ -79,14 +68,14 @@ BIST(void){
return;
BISTFail:
- printk_err("BIST failed!\n");
+ print_err("BIST failed!\n");
while(1);
}
/* ***************************************************************************/
/* * cpuRegInit*/
/* ***************************************************************************/
void
-cpuRegInit (int diagmode){
+cpuRegInit (void){
int msrnum;
msr_t msr;
/* Turn on BTM for early debug based on setup. */
@@ -197,11 +186,6 @@ cpuRegInit (int diagmode){
wrmsr(msrnum, msr);
/* */
-/* Set the Delay Control in GLCP*/
-/* */
-/* SetDelayControl();*/
-
-/* */
/* Enable RSDC*/
/* */
msrnum = 0x1301 ;
@@ -215,7 +199,7 @@ cpuRegInit (int diagmode){
/* */
/*if (getnvram( TOKEN_BIST_ENABLE) & == TVALUE_DISABLE) {*/
{
- BIST();
+// BIST();
}
@@ -303,6 +287,6 @@ MTestPinCheckBX (void){
}
/* Lock the cache down here.*/
- wbinvd();
+ __asm__("wbinvd\n");
}
diff --git a/src/cpu/amd/model_gx2/model_gx2_init.c b/src/cpu/amd/model_gx2/model_gx2_init.c
index 185faf2197..9fc5d2679d 100644
--- a/src/cpu/amd/model_gx2/model_gx2_init.c
+++ b/src/cpu/amd/model_gx2/model_gx2_init.c
@@ -73,8 +73,6 @@ unsigned long addr;
}
#endif
-#include "cpureginit.c"
-
static void model_gx2_init(device_t dev)
{
void do_vsmbios(void);