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authorSheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>2020-04-10 15:25:01 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-05-01 06:43:06 +0000
commitf86c3265e8014b085de08094d7a30847fa49c165 (patch)
tree8a9b185b7e5898415cdfd2e708dc36e82a5b0684 /src/cpu/amd/mtrr/Makefile.inc
parente11072e6c77f3e6d137fb328f9b8e14729cfc749 (diff)
downloadcoreboot-f86c3265e8014b085de08094d7a30847fa49c165.tar.xz
mb/google/octopus/variants/bobba: Disable XHCI LFPS power management
LTE module is lost after idle overnight, with this workaround, host will not initiate U3 wakeup at the same time with device, which will avoid the race condition. Disable XHCI LFPS power management. If the option is set in the devicetree, the bits[7:4] in XHCI MMIO BAR + offset 0x80A4 (PMCTRL_REG) will be updated from default 9 to 0. BUG=b:146768983 BRANCH=octopus TEST=build coreboot with DisableXhciLfpsPM being set to 1 and flash the image to the device. Run following command to check if bits[7:4] is set 0: >iotools mmio_read32 "XHCI MMIO BAR + 0x80A4" Signed-off-by: Pan Sheng-Liang <sheng-liang.pan@quanta.corp-partner.google.com> Change-Id: Ib8e5ae79e097debf0c75ead232ddbb2baced2a2a Reviewed-on: https://review.coreboot.org/c/coreboot/+/40303 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marco Chen <marcochen@google.com> Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
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