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authorEric Biederman <ebiederm@xmission.com>2004-10-21 02:43:15 +0000
committerEric Biederman <ebiederm@xmission.com>2004-10-21 02:43:15 +0000
commit29490a17ced79768a337642f36066c5c07922966 (patch)
tree464291309c991a9644d330a347adfc6e9506d317 /src/cpu/amd/mtrr
parentf19e2c766ac602f51882cf3c1c28c90d12f21c8d (diff)
downloadcoreboot-29490a17ced79768a337642f36066c5c07922966.tar.xz
- We already know the cache is disabled so don't bother disabling it.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1696 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/mtrr')
-rw-r--r--src/cpu/amd/mtrr/amd_earlymtrr.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/cpu/amd/mtrr/amd_earlymtrr.c b/src/cpu/amd/mtrr/amd_earlymtrr.c
index ca19a57faa..b55f56d604 100644
--- a/src/cpu/amd/mtrr/amd_earlymtrr.c
+++ b/src/cpu/amd/mtrr/amd_earlymtrr.c
@@ -27,7 +27,12 @@ static void amd_early_mtrr_init(void)
};
msr_t msr;
- disable_cache();
+ /* wbinvd which is called in disable_cache() causes hangs on Opterons
+ * if there is no data in the cache.
+ * At this point we should not have the cache enabled so don't bother
+ * disabling it.
+ */
+ /* disable_cache(); */
do_early_mtrr_init(mtrr_msrs);
/* Enable memory access for 0 - 1MB using top_mem */