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author | Yinghai Lu <yinghailu@gmail.com> | 2005-01-17 23:47:55 +0000 |
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committer | Yinghai Lu <yinghailu@gmail.com> | 2005-01-17 23:47:55 +0000 |
commit | 328852d24353f439e0419b50aebce39482f6a5cd (patch) | |
tree | 3acc34c5511978d59d72b22767a35f31b611de78 /src/cpu/amd/mtrr | |
parent | 1f1085b433187f64f3d12961faad6e745a42c286 (diff) | |
download | coreboot-328852d24353f439e0419b50aebce39482f6a5cd.tar.xz |
fix reboot broken
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1881 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/mtrr')
-rw-r--r-- | src/cpu/amd/mtrr/amd_earlymtrr.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/cpu/amd/mtrr/amd_earlymtrr.c b/src/cpu/amd/mtrr/amd_earlymtrr.c index d0647ac135..f2de79102b 100644 --- a/src/cpu/amd/mtrr/amd_earlymtrr.c +++ b/src/cpu/amd/mtrr/amd_earlymtrr.c @@ -16,11 +16,12 @@ static void do_amd_early_mtrr_init(const unsigned long *mtrr_msrs) msr_t msr; const unsigned long *msr_addr; unsigned long cr0; - +#if 0 /* Enable the access to AMD RdDram and WrDram extension bits */ msr = rdmsr(SYSCFG_MSR); msr.lo |= SYSCFG_MSR_MtrrFixDramModEn; wrmsr(SYSCFG_MSR, msr); +#endif /* Inialize all of the relevant msrs to 0 */ msr.lo = 0; @@ -29,11 +30,12 @@ static void do_amd_early_mtrr_init(const unsigned long *mtrr_msrs) for(msr_addr = mtrr_msrs; (msr_nr = *msr_addr); msr_addr++) { wrmsr(msr_nr, msr); } - +#if 0 /* Disable the access to AMD RdDram and WrDram extension bits */ msr = rdmsr(SYSCFG_MSR); msr.lo &= ~SYSCFG_MSR_MtrrFixDramModEn; wrmsr(SYSCFG_MSR, msr); +#endif /* Enable memory access for 0 - 1MB using top_mem */ msr.hi = 0; |