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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-10-21 18:22:32 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-11-20 19:02:37 +0100
commite4c17ce8036ae247f5e73c37789a9181e7cbd3c7 (patch)
tree47f6bd7cb995f7c1c33a8e4bc52034cee3b3471d /src/cpu/amd/pi/Makefile.inc
parent84693d3dd40bdb291ec8dd92f99a4349da0db62b (diff)
downloadcoreboot-e4c17ce8036ae247f5e73c37789a9181e7cbd3c7.tar.xz
AMD: Isolate AGESA and PI build environments
To backport features introduced with recent Chromebooks and/or Intel boards in general, heavy work on the AMD AGESA platform infrastructure is required. With the AGESA PI available in binary form only, community members have little means to verify, debug and develop for the said platforms. Thus it makes sense to fork the existing agesawrapper interfaces, to give AMD PI platforms a clean and independent sandbox. New directory layout reflects the separation already taken place under 3rdparty/ and vendorcode/. Change-Id: Ib60861266f8a70666617dde811663f2d5891a9e0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7149 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu/amd/pi/Makefile.inc')
-rw-r--r--src/cpu/amd/pi/Makefile.inc45
1 files changed, 45 insertions, 0 deletions
diff --git a/src/cpu/amd/pi/Makefile.inc b/src/cpu/amd/pi/Makefile.inc
new file mode 100644
index 0000000000..8228b12182
--- /dev/null
+++ b/src/cpu/amd/pi/Makefile.inc
@@ -0,0 +1,45 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2011 - 2012 Advanced Micro Devices, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+#
+
+subdirs-$(CONFIG_CPU_AMD_PI_00730F01) += 00730F01
+
+romstage-y += s3_resume.c
+ramstage-y += s3_resume.c
+ramstage-$(CONFIG_SPI_FLASH) += spi.c
+
+cpu_incs += $(src)/cpu/amd/pi/cache_as_ram.inc
+
+romstage-y += heapmanager.c
+ramstage-y += heapmanager.c
+ramstage-y += amd_late_init.c
+
+ifeq ($(CONFIG_HAVE_ACPI_RESUME), y)
+
+$(obj)/coreboot_s3nv.rom: $(obj)/config.h
+ echo " S3 NVRAM $(CONFIG_S3_DATA_POS) (S3 storage area)"
+ # force C locale, so cygwin awk doesn't try to interpret the 0xff below as UTF-8 (or worse)
+ printf %d $(CONFIG_S3_DATA_SIZE) | LC_ALL=C awk '{for (i=0; i<$$1; i++) {printf "%c", 255}}' > $@.tmp
+ mv $@.tmp $@
+
+cbfs-files-y += s3nv
+s3nv-file := $(obj)/coreboot_s3nv.rom
+s3nv-position := $(CONFIG_S3_DATA_POS)
+s3nv-type := raw
+
+endif # CONFIG_HAVE_ACPI_RESUME == y